Lines Matching defs:EAX
596 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
598 MaxLeaf = &EAX;
669 static void detectX86FamilyModel(unsigned EAX, unsigned *Family,
671 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11
672 *Model = (EAX >> 4) & 0xf; // Bits 4 - 7
676 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27
678 *Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19
1262 unsigned EAX, EBX;
1303 bool HasAVX = ((ECX & AVXBits) == AVXBits) && !getX86XCR0(&EAX, &EDX) &&
1304 ((EAX & 0x6) == 0x6);
1312 bool HasAVX512Save = HasAVX && ((EAX & 0xe0) == 0xe0);
1319 MaxLeaf >= 0x7 && !getX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX);
1370 // EAX from subleaf 0 is the maximum subleaf supported. Some CPUs don't
1373 HasLeaf7 && EAX >= 1 &&
1374 !getX86CpuIDAndInfoEx(0x7, 0x1, &EAX, &EBX, &ECX, &EDX);
1375 if (HasLeaf7Subleaf1 && ((EAX >> 5) & 1) && HasAVX512Save)
1382 !getX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
1400 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
1401 getX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
1405 detectX86FamilyModel(EAX, &Family, &Model);
1812 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
1819 getX86CpuIDAndInfo(1, &EAX, &EBX, &ECX, &EDX);
1843 bool HasXSave = ((ECX >> 27) & 1) && !getX86XCR0(&EAX, &EDX);
1844 bool HasAVXSave = HasXSave && ((ECX >> 28) & 1) && ((EAX & 0x6) == 0x6);
1852 bool HasAVX512Save = HasAVXSave && ((EAX & 0xe0) == 0xe0);
1856 bool HasAMXSave = HasXSave && ((EAX & AMXBits) == AMXBits);
1868 !getX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
1884 !getX86CpuIDAndInfo(0x80000008, &EAX, &EBX, &ECX, &EDX);
1890 MaxLevel >= 7 && !getX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX);
1940 // EAX=0x7, ECX=0x0 indicates the availability of the instruction (via the 18th
1941 // bit of EDX), while the EAX=0x1b leaf returns information on the
1953 // EAX from subleaf 0 is the maximum subleaf supported. Some CPUs don't
1956 HasLeaf7 && EAX >= 1 &&
1957 !getX86CpuIDAndInfoEx(0x7, 0x1, &EAX, &EBX, &ECX, &EDX);
1958 Features["sha512"] = HasLeaf7Subleaf1 && ((EAX >> 0) & 1);
1959 Features["sm3"] = HasLeaf7Subleaf1 && ((EAX >> 1) & 1);
1960 Features["sm4"] = HasLeaf7Subleaf1 && ((EAX >> 2) & 1);
1961 Features["raoint"] = HasLeaf7Subleaf1 && ((EAX >> 3) & 1);
1962 Features["avxvnni"] = HasLeaf7Subleaf1 && ((EAX >> 4) & 1) && HasAVXSave;
1963 Features["avx512bf16"] = HasLeaf7Subleaf1 && ((EAX >> 5) & 1) && HasAVX512Save;
1964 Features["amx-fp16"] = HasLeaf7Subleaf1 && ((EAX >> 21) & 1) && HasAMXSave;
1965 Features["cmpccxadd"] = HasLeaf7Subleaf1 && ((EAX >> 7) & 1);
1966 Features["hreset"] = HasLeaf7Subleaf1 && ((EAX >> 22) & 1);
1967 Features["avxifma"] = HasLeaf7Subleaf1 && ((EAX >> 23) & 1) && HasAVXSave;
1968 Features["movrs"] = HasLeaf7Subleaf1 && ((EAX >> 31) & 1);
1987 !getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
1990 Features["xsaveopt"] = HasLeafD && ((EAX >> 0) & 1) && HasAVXSave;
1991 Features["xsavec"] = HasLeafD && ((EAX >> 1) & 1) && HasAVXSave;
1992 Features["xsaves"] = HasLeafD && ((EAX >> 3) & 1) && HasAVXSave;
1995 !getX86CpuIDAndInfoEx(0x14, 0x0, &EAX, &EBX, &ECX, &EDX);
2000 MaxLevel >= 0x19 && !getX86CpuIDAndInfo(0x19, &EAX, &EBX, &ECX, &EDX);
2004 !getX86CpuIDAndInfoEx(0x1e, 0x1, &EAX, &EBX, &ECX, &EDX);
2005 Features["amx-fp8"] = HasLeaf1E && ((EAX >> 4) & 1) && HasAMXSave;
2006 Features["amx-transpose"] = HasLeaf1E && ((EAX >> 5) & 1) && HasAMXSave;
2007 Features["amx-tf32"] = HasLeaf1E && ((EAX >> 6) & 1) && HasAMXSave;
2008 Features["amx-avx512"] = HasLeaf1E && ((EAX >> 7) & 1) && HasAMXSave;
2009 Features["amx-movrs"] = HasLeaf1E && ((EAX >> 8) & 1) && HasAMXSave;
2012 MaxLevel >= 0x24 && !getX86CpuIDAndInfo(0x24, &EAX, &EBX, &ECX, &EDX);