Lines Matching defs:BasePtr

75     BasePtr = Use64BitReg ? X86::RBX : X86::EBX;
80     BasePtr = X86::ESI;
590     Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64);
591     for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr))
813     return MRI->canReserveReg(BasePtr);
838   Register BasePtr = MI.getOperand(1).getReg();
843     BasePtr = getX86SubSuperRegister(BasePtr, 32);
847   TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr,
881     assert(BasePtr == FramePtr && "Expected the FP as base register");
918   Register BasePtr;
924         TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0).getFixed();
926     FIOffset = TFI->getWin64EHFrameIndexRef(MF, FrameIndex, BasePtr);
928     FIOffset = TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed();
943   // For LEA64_32r when BasePtr is 32-bits (X32) we can use full-size 64-bit
946   // Don't change BasePtr since it is used later for stack adjustment.
947   Register MachineBasePtr = BasePtr;
948   if (Opc == X86::LEA64_32r && X86::GR32RegClass.contains(BasePtr))
949     MachineBasePtr = getX86SubSuperRegister(BasePtr, 64);
955   if (BasePtr == StackPtr)
961     assert(BasePtr == FramePtr && "Expected the FP as base register");