Lines Matching defs:CallingConv
50 static bool shouldDisableRetRegFromCSR(CallingConv::ID CC) {
54 case CallingConv::X86_RegCall:
55 case CallingConv::PreserveMost:
56 case CallingConv::PreserveAll:
64 static bool shouldDisableArgRegFromCSR(CallingConv::ID CC) {
65 return CC == CallingConv::X86_RegCall;
69 handleMaskRegisterForCallingConv(unsigned NumElts, CallingConv::ID CC,
77 if (NumElts == 8 && CC != CallingConv::X86_RegCall &&
78 CC != CallingConv::Intel_OCL_BI)
80 if (NumElts == 16 && CC != CallingConv::X86_RegCall &&
81 CC != CallingConv::Intel_OCL_BI)
85 if (NumElts == 32 && (!Subtarget.hasBWI() || CC != CallingConv::X86_RegCall))
88 if (NumElts == 64 && Subtarget.hasBWI() && CC != CallingConv::X86_RegCall) {
103 CallingConv::ID CC,
139 CallingConv::ID CC,
175 LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,
191 CC != CallingConv::X86_RegCall) {
237 Type *Ty, CallingConv::ID CallConv, bool isVarArg,
445 if (CC != CallingConv::C && CC != CallingConv::X86_StdCall)
610 F->setCallingConv(CallingConv::X86_FastCall);
669 CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg,
677 const MCPhysReg *X86TargetLowering::getScratchRegisters(CallingConv::ID) const {
743 X86TargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
758 if (CallConv == CallingConv::X86_INTR && !Outs.empty())
922 CallConv != CallingConv::PreserveAll &&
923 CallConv != CallingConv::PreserveMost)
946 if (CallConv == CallingConv::X86_INTR)
1102 SDValue Chain, SDValue InGlue, CallingConv::ID CallConv, bool isVarArg,
1255 static bool canGuaranteeTCO(CallingConv::ID CC) {
1256 return (CC == CallingConv::Fast || CC == CallingConv::GHC ||
1257 CC == CallingConv::X86_RegCall || CC == CallingConv::HiPE ||
1258 CC == CallingConv::Tail || CC == CallingConv::SwiftTail);
1262 static bool mayTailCallThisCC(CallingConv::ID CC) {
1265 case CallingConv::C:
1266 case CallingConv::Win64:
1267 case CallingConv::X86_64_SysV:
1268 case CallingConv::PreserveNone:
1270 case CallingConv::X86_ThisCall:
1271 case CallingConv::X86_StdCall:
1272 case CallingConv::X86_VectorCall:
1273 case CallingConv::X86_FastCall:
1275 case CallingConv::Swift:
1284 static bool shouldGuaranteeTCO(CallingConv::ID CC, bool GuaranteedTailCallOpt) {
1286 CC == CallingConv::Tail || CC == CallingConv::SwiftTail;
1293 CallingConv::ID CalleeCC = CI->getCallingConv();
1301 X86TargetLowering::LowerMemArgument(SDValue Chain, CallingConv::ID CallConv,
1419 static ArrayRef<MCPhysReg> get64BitArgumentGPRs(CallingConv::ID CallConv,
1438 CallingConv::ID CallConv,
1477 CallingConv::ID CallConv, CCState &CCInfo)
1506 CallingConv::ID CallConv;
1516 if (is64Bit() || (CallConv != CallingConv::X86_FastCall &&
1517 CallConv != CallingConv::X86_ThisCall)) {
1628 (is64Bit() || (CallConv == CallingConv::X86_VectorCall ||
1629 CallConv == CallingConv::Intel_OCL_BI)))
1679 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
1710 if (CallingConv::X86_VectorCall == CallConv) {
1842 if (CallConv == CallingConv::Swift || CallConv == CallingConv::SwiftTail)
1876 } else if (CallConv == CallingConv::X86_INTR && Ins.size() == 2) {
1918 if (CallingConv::PreserveNone == CallConv)
2009 CallingConv::ID CallConv = CLI.CallConv;
2019 CallConv == CallingConv::Tail || CallConv == CallingConv::SwiftTail;
2031 if (CallConv == CallingConv::X86_INTR)
2046 if (CallingConv::X86_VectorCall == CallConv) {
2270 if (CallConv != CallingConv::X86_RegCall)
2345 assert((CallConv == CallingConv::X86_RegCall) &&
2450 AdaptedCC = (CallingConv::ID)CallingConv::X86_INTR;
2454 AdaptedCC = (CallingConv::ID)CallingConv::GHC;
2589 if (CallingConv::PreserveNone == CallConv)
2757 CallingConv::ID CalleeCC = CLI.CallConv;
2773 CallingConv::ID CallerCC = CallerF.getCallingConv();
2778 CalleeCC == CallingConv::Tail || CalleeCC == CallingConv::SwiftTail;
2946 bool X86::isCalleePop(CallingConv::ID CallingConv,
2950 if (!IsVarArg && shouldGuaranteeTCO(CallingConv, GuaranteeTCO))
2953 switch (CallingConv) {
2956 case CallingConv::X86_StdCall:
2957 case CallingConv::X86_FastCall:
2958 case CallingConv::X86_ThisCall:
2959 case CallingConv::X86_VectorCall: