Lines Matching defs:X86TargetLowering
129 X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
2736 bool X86TargetLowering::useLoadStackGuardNode(const Module &M) const {
2740 bool X86TargetLowering::useStackGuardXorFP() const {
2745 SDValue X86TargetLowering::emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
2754 X86TargetLowering::getPreferredVectorAction(MVT VT) const {
2771 X86TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
2899 SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const {
3091 bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
3240 bool X86TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
3248 bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
3286 bool X86TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
3296 bool X86TargetLowering::reduceSelectOfFPConstantLoads(EVT CmpOpVT) const {
3305 bool X86TargetLowering::convertSelectOfConstantsToMath(EVT VT) const {
3314 bool X86TargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT,
3346 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
3360 bool X86TargetLowering::shouldScalarizeBinop(SDValue VecOp) const {
3379 bool X86TargetLowering::shouldFormOverflowOp(unsigned Opcode, EVT VT,
3387 bool X86TargetLowering::isCheapToSpeculateCttz(Type *Ty) const {
3396 bool X86TargetLowering::isCheapToSpeculateCtlz(Type *Ty) const {
3403 bool X86TargetLowering::ShouldShrinkFPConstant(EVT VT) const {
3410 bool X86TargetLowering::isScalarFPTypeInSSEReg(EVT VT) const {
3415 bool X86TargetLowering::isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
3433 bool X86TargetLowering::canMergeStoresTo(unsigned AddressSpace, EVT MemVT,
3451 bool X86TargetLowering::isCtlzFast() const {
3455 bool X86TargetLowering::isMaskAndCmp0FoldingBeneficial(
3460 bool X86TargetLowering::hasAndNotCompare(SDValue Y) const {
3476 bool X86TargetLowering::hasAndNot(SDValue Y) const {
3493 bool X86TargetLowering::hasBitTest(SDValue X, SDValue Y) const {
3497 bool X86TargetLowering::
3520 unsigned X86TargetLowering::preferedOpcodeForCmpEqPiecesOfOperand(
3588 X86TargetLowering::getJumpConditionMergingParams(Instruction::BinaryOps Opc,
3605 bool X86TargetLowering::preferScalarizeSplat(SDNode *N) const {
3609 bool X86TargetLowering::shouldFoldConstantShiftPairToMask(
3628 bool X86TargetLowering::shouldFoldMaskToVariableShiftPair(SDValue Y) const {
3643 X86TargetLowering::preferredShiftLegalizationStrategy(
3652 bool X86TargetLowering::shouldSplatInsEltVarIndex(EVT VT) const {
3658 MVT X86TargetLowering::hasFastEqualityCompare(unsigned NumBits) const {
4890 X86TargetLowering::getTargetConstantFromLoad(LoadSDNode *LD) const {
8997 X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
18146 SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
18390 X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
18571 SDValue X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
18852 unsigned X86TargetLowering::getGlobalWrapperKind(
18878 X86TargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const {
18901 SDValue X86TargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
18923 SDValue X86TargetLowering::LowerExternalSymbol(SDValue Op,
18929 X86TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
18952 SDValue X86TargetLowering::LowerGlobalOrExternal(SDValue Op, SelectionDAG &DAG,
19027 X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
19219 X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
19364 bool X86TargetLowering::addressingModeSupportsTLS(const GlobalValue &GV) const {
19718 SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
19816 std::pair<SDValue, SDValue> X86TargetLowering::BuildFILD(
20217 SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
20377 SDValue X86TargetLowering::FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
21077 SDValue X86TargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
21237 SDValue X86TargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const {
21597 SDValue X86TargetLowering::LowerLRINT_LLRINT(SDValue Op,
21616 SDValue X86TargetLowering::LRINT_LLRINTHelper(SDNode *N,
21662 X86TargetLowering::LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const {
21812 SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
21930 SDValue X86TargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
22083 SDValue X86TargetLowering::LowerFP_TO_BF16(SDValue Op,
22181 SDValue X86TargetLowering::lowerFaddFsub(SDValue Op, SelectionDAG &DAG) const {
23166 bool X86TargetLowering::isXAndYEqZeroPreferableToXAndYEqY(ISD::CondCode Cond,
23171 bool X86TargetLowering::optimizeFMulOrFDivAsShiftAddBitcast(
23190 bool X86TargetLowering::isFsqrtCheap(SDValue Op, SelectionDAG &DAG) const {
23208 SDValue X86TargetLowering::getSqrtEstimate(SDValue Op,
23262 SDValue X86TargetLowering::getRecipEstimate(SDValue Op, SelectionDAG &DAG,
23317 unsigned X86TargetLowering::combineRepeatedFPDivisors() const {
23322 X86TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
24156 SDValue X86TargetLowering::emitFlagsForSetcc(SDValue Op0, SDValue Op1,
24245 SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
24344 SDValue X86TargetLowering::LowerSETCCCARRY(SDValue Op, SelectionDAG &DAG) const {
24587 SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
25298 SDValue X86TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
25423 X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
25510 SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
25567 SDValue X86TargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
25965 SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
27873 SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op,
27900 SDValue X86TargetLowering::LowerADDROFRETURNADDR(SDValue Op,
27906 SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
27946 Register X86TargetLowering::getRegisterByName(const char* RegName, LLT VT,
27979 SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
27985 Register X86TargetLowering::getExceptionPointerRegister(
27993 Register X86TargetLowering::getExceptionSelectorRegister(
28001 bool X86TargetLowering::needsFixedCatchObjects() const {
28005 SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {
28031 SDValue X86TargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
28049 SDValue X86TargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
28056 SDValue X86TargetLowering::lowerEH_SJLJ_SETUP_DISPATCH(SDValue Op,
28067 SDValue X86TargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
28212 SDValue X86TargetLowering::LowerGET_ROUNDING(SDValue Op,
28276 SDValue X86TargetLowering::LowerSET_ROUNDING(SDValue Op,
28394 SDValue X86TargetLowering::LowerGET_FPENV_MEM(SDValue Op,
28461 SDValue X86TargetLowering::LowerSET_FPENV_MEM(SDValue Op,
28473 SDValue X86TargetLowering::LowerRESET_FPENV(SDValue Op,
29623 SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) const {
29687 SDValue X86TargetLowering::LowerWin64_FP_TO_INT128(SDValue Op,
29721 SDValue X86TargetLowering::LowerWin64_INT128_TO_FP(SDValue Op,
31295 bool X86TargetLowering::needsCmpXchgNb(Type *MemType) const {
31307 X86TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {
31327 X86TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
31420 X86TargetLowering::shouldExpandLogicAtomicRMWInIR(AtomicRMWInst *AI) const {
31495 void X86TargetLowering::emitBitTestAtomicRMWIntrinsic(AtomicRMWInst *AI) const {
31638 void X86TargetLowering::emitCmpArithAtomicRMWIntrinsic(
31702 X86TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
31750 X86TargetLowering::lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const {
33034 SDValue X86TargetLowering::LowerGC_TRANSITION(SDValue Op,
33138 bool X86TargetLowering::isInlineAsmTargetBranch(
33160 SDValue X86TargetLowering::visitMaskedLoad(
33180 SDValue X86TargetLowering::visitMaskedStore(SelectionDAG &DAG, const SDLoc &DL,
33198 SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
33362 void X86TargetLowering::ReplaceNodeResults(SDNode *N,
34539 const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
35011 bool X86TargetLowering::isLegalAddressingMode(const DataLayout &DL,
35063 bool X86TargetLowering::isBinOp(unsigned Opcode) const {
35083 bool X86TargetLowering::isCommutativeBinOp(unsigned Opcode) const {
35100 bool X86TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
35108 bool X86TargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
35122 bool X86TargetLowering::isLegalICmpImmediate(int64_t Imm) const {
35126 bool X86TargetLowering::isLegalAddImmediate(int64_t Imm) const {
35131 bool X86TargetLowering::isLegalStoreImmediate(int64_t Imm) const {
35135 bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
35143 bool X86TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {
35148 bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const {
35153 bool X86TargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
35177 bool X86TargetLowering::shouldConvertPhiType(Type *From, Type *To) const {
35183 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const {
35196 bool X86TargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
35222 bool X86TargetLowering::isNarrowingProfitable(SDNode *N, EVT SrcVT,
35228 bool X86TargetLowering::shouldFoldSelectWithIdentityConstant(unsigned Opcode,
35246 bool X86TargetLowering::isShuffleMaskLegal(ArrayRef<int> Mask, EVT VT) const {
35263 bool X86TargetLowering::isVectorClearMaskLegal(ArrayRef<int> Mask,
35275 bool X86TargetLowering::areJTsAllowed(const Function *Fn) const {
35284 MVT X86TargetLowering::getPreferredSwitchConditionType(LLVMContext &Context,
35403 X86TargetLowering::EmitVAARGWithCustomInserter(MachineInstr &MI,
35797 X86TargetLowering::EmitLoweredCascadedSelect(MachineInstr &FirstCMOV,
35950 X86TargetLowering::EmitLoweredSelect(MachineInstr &MI,
36100 X86TargetLowering::EmitLoweredProbedAlloca(MachineInstr &MI,
36194 X86TargetLowering::EmitLoweredSegAlloca(MachineInstr &MI,
36328 X86TargetLowering::EmitLoweredCatchRet(MachineInstr &MI,
36363 X86TargetLowering::EmitLoweredTLSCall(MachineInstr &MI,
36506 X86TargetLowering::EmitLoweredIndirectThunk(MachineInstr &MI,
36568 void X86TargetLowering::emitSetJmpShadowStackFix(MachineInstr &MI,
36610 X86TargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
36770 X86TargetLowering::emitLongJmpShadowStackFix(MachineInstr &MI,
36959 X86TargetLowering::emitEHSjLjLongJmp(MachineInstr &MI,
37042 void X86TargetLowering::SetupEntryBlockForSjLj(MachineInstr &MI,
37093 X86TargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI,
37324 X86TargetLowering::emitPatchableEventCall(MachineInstr &MI,
37349 X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
37611 // After X86TargetLowering::ReplaceNodeResults CMPXCHG8B is glued to its
38008 X86TargetLowering::targetShrinkDemandedConstant(SDValue Op,
38187 void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
38650 unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode(
38819 SDValue X86TargetLowering::unwrapAddress(SDValue N) const {
42926 bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle(
42993 bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
43786 bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
44333 SDValue X86TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(
44453 bool X86TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
44490 bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode(
44528 bool X86TargetLowering::isSplatValueForTargetNode(SDValue Op,
54121 SDValue X86TargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
55087 // 1) X86TargetLowering::EmitLoweredSelect later can do merging of two
58037 const X86TargetLowering *TLI = Subtarget.getTargetLowering();
59335 SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
59536 bool X86TargetLowering::preferABDSToABSWithNSW(EVT VT) const {
59541 bool X86TargetLowering::preferSextInRegOfTruncate(EVT TruncVT, EVT VT,
59546 bool X86TargetLowering::isTypeDesirableForOp(unsigned Opc, EVT VT) const {
59596 SDValue X86TargetLowering::expandIndirectJTBranch(const SDLoc &dl,
59618 X86TargetLowering::isDesirableToCombineLogicOpOfSETCC(
59640 bool X86TargetLowering::IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const {
59776 bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
59887 X86TargetLowering::ConstraintType
59888 X86TargetLowering::getConstraintType(StringRef Constraint) const {
59967 X86TargetLowering::getSingleConstraintMatchWeight(
60116 const char *X86TargetLowering::
60129 SDValue X86TargetLowering::LowerAsmOutputForConstraint(
60156 void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
60353 X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
60857 bool X86TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const {
60869 void X86TargetLowering::initializeSplitCSR(MachineBasicBlock *Entry) const {
60879 void X86TargetLowering::insertCopiesSplitCSR(
60918 bool X86TargetLowering::supportSwiftError() const {
60923 X86TargetLowering::EmitKCFICheck(MachineBasicBlock &MBB,
60970 // X86TargetLowering::EmitLoweredIndirectThunk always uses r11 for
60988 bool X86TargetLowering::hasStackProbeSymbol(const MachineFunction &MF) const {
60993 bool X86TargetLowering::hasInlineStackProbe(const MachineFunction &MF) const {
61011 X86TargetLowering::getStackProbeSymbolName(const MachineFunction &MF) const {
61034 X86TargetLowering::getStackProbeSize(const MachineFunction &MF) const {
61041 Align X86TargetLowering::getPrefLoopAlignment(MachineLoop *ML) const {