Lines Matching defs:TLO
38011 TargetLoweringOpt &TLO) const {
38039 EVT ExtSVT = EVT::getIntegerVT(*TLO.DAG.getContext(), ActiveBits);
38040 EVT ExtVT = EVT::getVectorVT(*TLO.DAG.getContext(), ExtSVT,
38043 TLO.DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(Op), VT,
38044 Op.getOperand(1), TLO.DAG.getValueType(ExtVT));
38046 TLO.DAG.getNode(Opcode, SDLoc(Op), VT, Op.getOperand(0), NewC);
38047 return TLO.CombineTo(Op, NewOp);
38094 SDValue NewC = TLO.DAG.getConstant(ZeroExtendMask, DL, VT);
38095 SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC);
38096 return TLO.CombineTo(Op, NewOp);
42928 TargetLowering::TargetLoweringOpt &TLO, unsigned Depth) const {
42940 if (SimplifyDemandedVectorElts(Mask, DemandedElts, MaskUndef, MaskZero, TLO,
42984 SDValue CV = TLO.DAG.getConstantPool(ConstantVector::get(ConstVecOps), BCVT);
42985 SDValue LegalCV = LowerConstantPool(CV, TLO.DAG);
42986 SDValue NewMask = TLO.DAG.getLoad(
42987 BCVT, DL, TLO.DAG.getEntryNode(), LegalCV,
42988 MachinePointerInfo::getConstantPool(TLO.DAG.getMachineFunction()),
42990 return TLO.CombineTo(Mask, TLO.DAG.getBitcast(Mask.getValueType(), NewMask));
42995 TargetLoweringOpt &TLO, unsigned Depth) const {
43008 if (SimplifyDemandedVectorElts(LHS, DemandedElts, LHSUndef, LHSZero, TLO,
43011 if (SimplifyDemandedVectorElts(RHS, DemandedElts, RHSUndef, RHSZero, TLO,
43026 if (SimplifyDemandedVectorElts(LHS, DemandedSrcElts, LHSUndef, LHSZero, TLO,
43029 if (SimplifyDemandedVectorElts(RHS, DemandedSrcElts, RHSUndef, RHSZero, TLO,
43037 if (SimplifyDemandedVectorElts(LHS, DemandedLHSElts, LHSUndef, LHSZero, TLO,
43041 if (SimplifyDemandedVectorElts(RHS, DemandedRHSElts, RHSUndef, RHSZero, TLO,
43059 LHS, DemandedSrcElts, TLO.DAG, Depth + 1);
43061 RHS, DemandedSrcElts, TLO.DAG, Depth + 1);
43065 return TLO.CombineTo(
43066 Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewLHS, NewRHS));
43091 if (SimplifyDemandedVectorElts(Amt, AmtElts, AmtUndef, AmtZero, TLO,
43101 if (SimplifyDemandedVectorElts(Src, DemandedElts, SrcUndef, KnownZero, TLO,
43107 return TLO.CombineTo(
43108 Op, getZeroVector(VT.getSimpleVT(), Subtarget, TLO.DAG, SDLoc(Op)));
43113 Src, DemandedElts, TLO.DAG, Depth + 1))
43114 return TLO.CombineTo(
43115 Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc, Op.getOperand(1)));
43127 if (SimplifyDemandedVectorElts(LHS, DemandedElts, LHSUndef, LHSZero, TLO,
43133 return TLO.CombineTo(
43134 Op, getZeroVector(VT.getSimpleVT(), Subtarget, TLO.DAG, SDLoc(Op)));
43136 if (SimplifyDemandedVectorElts(RHS, DemandedElts, RHSUndef, RHSZero, TLO,
43149 if (SimplifyDemandedVectorElts(LHS, DemandedElts, LHSUndef, LHSZero, TLO,
43152 if (SimplifyDemandedVectorElts(RHS, DemandedElts, RHSUndef, RHSZero, TLO,
43164 return TLO.CombineTo(Op, Src);
43180 SDValue NewSA = TLO.DAG.getTargetConstant(Diff, dl, MVT::i8);
43181 return TLO.CombineTo(
43182 Op, TLO.DAG.getNode(NewOpc, dl, VT, Src.getOperand(0), NewSA));
43187 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO,
43203 return TLO.CombineTo(Op, Src);
43219 SDValue NewSA = TLO.DAG.getTargetConstant(Diff, dl, MVT::i8);
43220 return TLO.CombineTo(
43221 Op, TLO.DAG.getNode(NewOpc, dl, VT, Src.getOperand(0), NewSA));
43226 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO,
43275 if (SimplifyDemandedVectorElts(LHS, EltsLHS, LHSUndef, LHSZero, TLO,
43278 if (SimplifyDemandedVectorElts(RHS, EltsRHS, RHSUndef, RHSZero, TLO,
43284 TLO.DAG, Depth + 1);
43286 TLO.DAG, Depth + 1);
43290 return TLO.CombineTo(
43291 Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewLHS, NewRHS));
43304 if (SimplifyDemandedVectorElts(Src, SrcElts, SrcUndef, SrcZero, TLO,
43318 if (SimplifyDemandedVectorElts(N0, DemandedLHS, LHSUndef, LHSZero, TLO,
43322 if (SimplifyDemandedVectorElts(N1, DemandedRHS, RHSUndef, RHSZero, TLO,
43332 TLO.DAG, Depth + 1);
43334 TLO.DAG, Depth + 1);
43338 return TLO.CombineTo(Op,
43339 TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewN0, NewN1));
43355 if (SimplifyDemandedVectorElts(N0, DemandedLHS, LHSUndef, LHSZero, TLO,
43359 if (SimplifyDemandedVectorElts(N1, DemandedRHS, RHSUndef, RHSZero, TLO,
43369 TLO.DAG, Depth + 1);
43371 TLO.DAG, Depth + 1);
43375 return TLO.CombineTo(Op,
43376 TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewN0, NewN1));
43388 if (SimplifyDemandedVectorElts(Src, DemandedSrc, SrcUndef, SrcZero, TLO,
43400 DemandedElts, TLO.DAG, Subtarget, SDLoc(Op)))
43401 return TLO.CombineTo(Op, R);
43407 SelZero, TLO, Depth + 1))
43413 LHSZero, TLO, Depth + 1))
43418 RHSZero, TLO, Depth + 1))
43430 if (TLO.DAG.MaskedVectorIsZero(Src, DemandedUpperElts, Depth + 1))
43431 return TLO.CombineTo(Op, Src);
43441 SDValue Elt = TLO.DAG.getLoad(SVT, DL, Mem->getChain(), Mem->getBasePtr(),
43443 SDValue Vec = TLO.DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT, Elt);
43444 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Vec));
43454 Src = TLO.DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(Op), VT, Src);
43456 Src = widenSubVector(VT.getSimpleVT(), Src, false, Subtarget, TLO.DAG,
43458 return TLO.CombineTo(Op, Src);
43464 if (SimplifyDemandedVectorElts(Src, SrcElts, SrcUndef, SrcZero, TLO,
43470 Src, SrcElts, TLO.DAG, Depth + 1))
43471 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc));
43475 if (SimplifyDemandedVectorEltsForTargetShuffle(Op, DemandedElts, 0, TLO,
43482 if (SimplifyDemandedVectorEltsForTargetShuffle(Op, DemandedElts, 1, TLO,
43488 if (SimplifyDemandedVectorEltsForTargetShuffle(Op, DemandedElts, 2, TLO,
43512 Src = extractSubVector(Src, 0, TLO.DAG, DL, ExtSizeInBits);
43513 EVT BcstVT = EVT::getVectorVT(*TLO.DAG.getContext(), VT.getScalarType(),
43515 SDValue Bcst = TLO.DAG.getNode(X86ISD::VBROADCAST, DL, BcstVT, Src);
43516 return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Bcst, 0,
43517 TLO.DAG, DL, ExtSizeInBits));
43522 EVT BcstVT = EVT::getVectorVT(*TLO.DAG.getContext(), VT.getScalarType(),
43524 SDVTList Tys = TLO.DAG.getVTList(BcstVT, MVT::Other);
43526 SDValue Bcst = TLO.DAG.getMemIntrinsicNode(
43529 TLO.DAG.makeEquivalentMemoryOrdering(SDValue(MemIntr, 1),
43531 return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Bcst, 0,
43532 TLO.DAG, DL, ExtSizeInBits));
43541 TLO.DAG.getLoad(MemVT, DL, MemIntr->getChain(),
43543 TLO.DAG.makeEquivalentMemoryOrdering(SDValue(MemIntr, 1),
43545 return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Ld, 0,
43546 TLO.DAG, DL, ExtSizeInBits));
43549 EVT BcstVT = EVT::getVectorVT(*TLO.DAG.getContext(), VT.getScalarType(),
43552 getBROADCAST_LOAD(Opc, DL, BcstVT, MemVT, MemIntr, 0, TLO.DAG))
43553 return TLO.CombineTo(Op,
43554 insertSubVector(TLO.DAG.getUNDEF(VT), BcstLd, 0,
43555 TLO.DAG, DL, ExtSizeInBits));
43572 extractSubVector(Op.getOperand(0), 0, TLO.DAG, DL, ExtSizeInBits);
43574 TLO.DAG.getNode(Opc, DL, Ext0.getValueType(), Ext0, Op.getOperand(1));
43575 SDValue UndefVec = TLO.DAG.getUNDEF(VT);
43577 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits);
43578 return TLO.CombineTo(Op, Insert);
43588 SDValue Ext = extractSubVector(Op.getOperand(0), 2, TLO.DAG, DL, 128);
43589 SDValue UndefVec = TLO.DAG.getUNDEF(VT);
43590 SDValue Insert = insertSubVector(UndefVec, Ext, 0, TLO.DAG, DL, 128);
43591 return TLO.CombineTo(Op, Insert);
43601 return TLO.CombineTo(
43602 Op, getZeroVector(VT.getSimpleVT(), Subtarget, TLO.DAG, DL));
43606 extractSubVector(Op.getOperand(SrcIdx), EltIdx, TLO.DAG, DL, 128);
43607 SDValue UndefVec = TLO.DAG.getUNDEF(VT);
43609 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits);
43610 return TLO.CombineTo(Op, Insert);
43625 SDValue ExtOp = TLO.DAG.getNode(
43626 Opc, DL, ExtVT, extractSubVector(SrcOp, 0, TLO.DAG, DL, SrcExtSize));
43627 SDValue UndefVec = TLO.DAG.getUNDEF(VT);
43629 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits);
43630 return TLO.CombineTo(Op, Insert);
43677 Ops.push_back(SrcVT.isVector() ? extractSubVector(SrcOp, 0, TLO.DAG, DL,
43684 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ops);
43685 SDValue UndefVec = TLO.DAG.getUNDEF(VT);
43687 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits);
43688 return TLO.CombineTo(Op, Insert);
43696 if (!DemandedElts.isOne() && TLO.DAG.isSplatValue(Op, /*AllowUndefs*/false))
43704 OpZero, TLO.DAG, Depth, false))
43726 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT));
43730 return TLO.CombineTo(
43731 Op, getZeroVector(VT.getSimpleVT(), Subtarget, TLO.DAG, SDLoc(Op)));
43735 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, OpInputs[Src]));
43755 TLO, Depth + 1))
43777 /*AllowCrossLaneVarMask*/ true, /*AllowPerLaneVarMask*/ true, TLO.DAG,
43780 return TLO.CombineTo(Op, NewShuffle);
43788 const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO,
43802 if (SimplifyDemandedBits(Src, TruncMask, DemandedElts, KnownOp, TLO, Depth + 1))
43820 if (!Is32BitAVX512 || !TLO.DAG.isSplatValue(LHS))
43822 if (!Is32BitAVX512 || !TLO.DAG.isSplatValue(RHS))
43826 KnownLHS, TLO, Depth + 1))
43829 KnownRHS, TLO, Depth + 1))
43837 SDValue Mask = TLO.DAG.getConstant(DemandedMask, DL, VT);
43838 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, DL, VT, LHS, Mask));
43843 LHS, DemandedMaskLHS, OriginalDemandedElts, TLO.DAG, Depth + 1);
43845 RHS, DemandedMaskRHS, OriginalDemandedElts, TLO.DAG, Depth + 1);
43849 return TLO.CombineTo(
43850 Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, DemandedLHS, DemandedRHS));
43860 Known, TLO, Depth + 1))
43864 OriginalDemandedElts, Known2, TLO, Depth + 1))
43869 OriginalDemandedElts, TLO))
43896 return TLO.CombineTo(Op, Op0.getOperand(0));
43899 SDValue NewShift = TLO.DAG.getNode(
43901 TLO.DAG.getTargetConstant(std::abs(Diff), SDLoc(Op), MVT::i8));
43902 return TLO.CombineTo(Op, NewShift);
43908 TLO.DAG.ComputeNumSignBits(Op0, OriginalDemandedElts, Depth + 1);
43911 return TLO.CombineTo(Op, Op0);
43914 TLO, Depth + 1))
43926 Op0, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1)) {
43928 TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, DemandedOp0, Op1);
43929 return TLO.CombineTo(Op, NewOp);
43945 TLO, Depth + 1))
43957 Op0, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1)) {
43959 TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, DemandedOp0, Op1);
43960 return TLO.CombineTo(Op, NewOp);
43977 return TLO.CombineTo(Op, Op0);
43983 TLO.DAG.ComputeNumSignBits(Op00, OriginalDemandedElts);
43985 return TLO.CombineTo(Op, Op00);
43994 TLO, Depth + 1))
44004 return TLO.CombineTo(
44005 Op, TLO.DAG.getNode(X86ISD::VSRLI, SDLoc(Op), VT, Op0, Op1));
44014 Op0, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1)) {
44016 TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, DemandedOp0, Op1);
44017 return TLO.CombineTo(Op, NewOp);
44029 Sel, SignMask, OriginalDemandedElts, TLO.DAG, Depth + 1);
44031 LHS, OriginalDemandedBits, OriginalDemandedElts, TLO.DAG, Depth + 1);
44033 RHS, OriginalDemandedBits, OriginalDemandedElts, TLO.DAG, Depth + 1);
44039 return TLO.CombineTo(Op, TLO.DAG.getNode(X86ISD::BLENDV, SDLoc(Op), VT,
44059 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT));
44064 KnownZero, TLO, Depth + 1))
44069 KnownVec, TLO, Depth + 1))
44073 Vec, DemandedVecBits, DemandedVecElts, TLO.DAG, Depth + 1))
44074 return TLO.CombineTo(
44075 Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, V, Op.getOperand(1)));
44092 return TLO.CombineTo(Op, Vec);
44098 KnownVec, TLO, Depth + 1))
44104 if (SimplifyDemandedBits(Scl, DemandedSclBits, KnownScl, TLO, Depth + 1))
44124 KnownLHS, TLO, Depth + 1))
44127 KnownRHS, TLO, Depth + 1))
44132 Op.getOperand(0), SignMask, DemandedLHS, TLO.DAG, Depth + 1);
44134 Op.getOperand(1), SignMask, DemandedRHS, TLO.DAG, Depth + 1);
44138 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, Op0, Op1));
44149 TLO, Depth + 1))
44159 TLO.DAG.getNode(ISD::TRUNCATE, SDLoc(Src), NewSrcVT, Src);
44162 TLO.DAG.getNode(X86ISD::VBROADCAST, SDLoc(Op), NewVT, NewSrc);
44163 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, NewBcst));
44172 return TLO.CombineTo(Op, Op.getOperand(1));
44182 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT));
44187 SDValue NewSrc = extract128BitVector(Src, 0, TLO.DAG, SDLoc(Src));
44188 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc));
44195 TLO, Depth + 1))
44204 if (SimplifyDemandedBits(Src, DemandedSrcBits, DemandedElts, KnownSrc, TLO,
44215 Src, DemandedSrcBits, DemandedElts, TLO.DAG, Depth + 1))
44216 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, NewSrc));
44231 return SimplifyDemandedBits(Op0, SignMask, KnownSrc, TLO, Depth + 1,
44233 SimplifyDemandedBits(Op1, SignMask, KnownSrc, TLO, Depth + 1,
44239 OriginalDemandedElts, Known2, TLO, Depth + 1))
44242 OriginalDemandedElts, Known, TLO, Depth + 1))
44261 return TLO.CombineTo(
44262 Op, TLO.DAG.getNode(X86ISD::BEXTR, DL, VT, Op0,
44263 TLO.DAG.getConstant(MaskedVal1, DL, VT)));
44277 if (SimplifyDemandedBits(Op0, DemandedMask, Known, TLO, Depth + 1))
44288 if (SimplifyDemandedBits(Op1, DemandedMask, Known1, TLO, Depth + 1))
44294 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT));
44308 if (SimplifyDemandedBits(Op1, LoMask, Known, TLO, Depth + 1))
44317 if (SimplifyDemandedBits(Op0, DemandedMask, Known2, TLO, Depth + 1))
44330 Op, OriginalDemandedBits, OriginalDemandedElts, Known, TLO, Depth);
46917 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
46919 if (!TLI.SimplifyDemandedBits(Cond, DemandedBits, Known, TLO, 0, true))
46936 DCI.CommitTargetLoweringOpt(TLO);