Lines Matching defs:Not

5302     if (SDValue Not = IsNOT(V.getOperand(0), DAG)) {
5303       Not = DAG.getBitcast(V.getOperand(0).getValueType(), Not);
5304       return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(Not), VT, Not,
10775       return SDValue(); // Not a blend.
11057     llvm_unreachable("Not a supported integer vector type!");
12189     // Not worth offsetting 128-bit vectors if scale == 2, a pattern using
16935     llvm_unreachable("Not a valid 256-bit x86 vector type!");
17576     llvm_unreachable("Not a valid 512-bit x86 vector type!");
22160          "Not expecting illegal vector widths here");
24618       assert(!VT.isVector() && "Not a scalar type?");
31371     bool Not = false;
31376       Not = true;
31400         BTK = Not ? NotShiftBit : ShiftBit;
31654     llvm_unreachable("Not supported Pred");
31828   // 8.2.3.9  Loads and Stores Are Not Reordered with Locked Instructions
33717         // Not a 128 bit vector, but maybe type legalization will promote
35250   // Not for i1 vectors
45648          "Not expecting more than 64 elements");
50212   if (SDValue Not = IsNOT(N0, DAG)) {
50213     X = Not;
50215   } else if (SDValue Not = IsNOT(N1, DAG)) {
50216     X = Not;
50260     if (SDValue Not = IsNOT(Src, DAG)) {
50261       SDValue NotSrc = DAG.getBitcast(Src.getValueType(), Not);
50276   if (SDValue Not = GetNot(N0)) {
50277     X = Not;
50279   } else if (SDValue Not = GetNot(N1)) {
50280     X = Not;
54740   if (SDValue Not = IsNOT(N0, DAG))
54741     return DAG.getNode(ISD::AND, DL, VT, DAG.getBitcast(VT, Not), N1);
54778         SDValue Not = getConstVector(EltBits0, VT, DAG, DL);
54779         return DAG.getNode(ISD::AND, DL, VT, Not, N1);
54834     if (SDValue Not = IsNOT(N1, DAG))
54836           DL, DAG.getNode(ISD::OR, DL, VT, N0, DAG.getBitcast(VT, Not)), VT);
60699   // Not found as a standard register?