Lines Matching defs:N11

42342       SDValue N11 = N1.getOperand(1);
42344           (N11 == N0 && (Opcode1 == ISD::FADD || Opcode1 == ISD::FMUL))) {
42346           std::swap(N10, N11);
42350         N11 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, SVT, N11, ZeroIdx);
42351         SDValue Scl = DAG.getNode(Opcode1, DL, SVT, N10, N11);
50460   // logic (setcc N00, N01), (setcc N10, N11) -->
50461   // extelt (logic (setcc (s2v N00), (s2v N01)), setcc (s2v N10), (s2v N11))), 0
50467   SDValue N11 = N1.getOperand(1);
50471   SDValue Vec11 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, N11);
51630   SDValue N11 = N1->getOperand(1);
51631   if (SDValue Result = foldMaskedMergeImpl(N00, N01, N10, N11, DL, DAG))
51633   if (SDValue Result = foldMaskedMergeImpl(N01, N00, N10, N11, DL, DAG))
51635   if (SDValue Result = foldMaskedMergeImpl(N10, N11, N00, N01, DL, DAG))
51637   if (SDValue Result = foldMaskedMergeImpl(N11, N10, N00, N01, DL, DAG))
53756   SDValue N11 = N1.getOperand(1);
53762   if (N11.getOpcode() == ISD::ZERO_EXTEND)
53763     std::swap(N10, N11);
53769       N11.getOpcode() != ISD::SIGN_EXTEND)
53776   N11 = N11.getOperand(0);
53782       N11.getValueType().getVectorElementType() != MVT::i8)
53789       N11.getOpcode() != ISD::BUILD_VECTOR)
53792   // N00/N10 are zero extended. N01/N11 are sign extended.
53805     SDValue N11Elt = N11.getOperand(i);
56857   SDValue N00, N01, N10, N11;
56859                          m_Mul(m_SExt(m_Value(N10)), m_SExt(m_Value(N11))))))
56865       N10.getValueType() != InVT || N11.getValueType() != InVT)
56872       N11.getOpcode() != ISD::BUILD_VECTOR)
56886     SDValue N11Elt = N11.getOperand(i);