Lines Matching defs:MIMD
35323 const MIMetadata MIMD(MI);
35373 BuildMI(thisMBB, MIMD, TII->get(X86::XBEGIN_4)).addMBB(fallMBB);
35379 BuildMI(mainMBB, MIMD, TII->get(X86::MOV32ri), mainDstReg).addImm(-1);
35380 BuildMI(mainMBB, MIMD, TII->get(X86::JMP_1)).addMBB(sinkMBB);
35387 BuildMI(fallMBB, MIMD, TII->get(X86::XABORT_DEF));
35388 BuildMI(fallMBB, MIMD, TII->get(TargetOpcode::COPY), fallDstReg)
35394 BuildMI(*sinkMBB, sinkMBB->begin(), MIMD, TII->get(X86::PHI), DstReg)
35447 const MIMetadata MIMD(MI);
35531 BuildMI(thisMBB, MIMD, TII->get(X86::MOV32rm), OffsetReg)
35540 BuildMI(thisMBB, MIMD, TII->get(X86::CMP32ri))
35546 BuildMI(thisMBB, MIMD, TII->get(X86::JCC_1))
35557 offsetMBB, MIMD,
35570 BuildMI(offsetMBB, MIMD, TII->get(X86::SUBREG_TO_REG), OffsetReg64)
35576 BuildMI(offsetMBB, MIMD, TII->get(X86::ADD64rr), OffsetDestReg)
35581 BuildMI(offsetMBB, MIMD, TII->get(X86::ADD32rr), OffsetDestReg)
35588 BuildMI(offsetMBB, MIMD, TII->get(X86::ADD32ri), NextOffsetReg)
35593 BuildMI(offsetMBB, MIMD, TII->get(X86::MOV32mr))
35603 BuildMI(offsetMBB, MIMD, TII->get(X86::JMP_1))
35613 BuildMI(overflowMBB, MIMD,
35631 overflowMBB, MIMD,
35638 overflowMBB, MIMD,
35644 BuildMI(overflowMBB, MIMD, TII->get(TargetOpcode::COPY), OverflowDestReg)
35652 overflowMBB, MIMD,
35659 BuildMI(overflowMBB, MIMD,
35671 BuildMI(*endMBB, endMBB->begin(), MIMD,
35748 const MIMetadata MIMD(*MIItBegin);
35782 BuildMI(*SinkMBB, SinkInsertionPoint, MIMD, TII->get(X86::PHI), DestReg)
35801 const MIMetadata MIMD(FirstCMOV);
35918 BuildMI(ThisMBB, MIMD, TII->get(X86::JCC_1)).addMBB(SinkMBB).addImm(FirstCC);
35922 BuildMI(FirstInsertedMBB, MIMD, TII->get(X86::JCC_1))
35932 BuildMI(*SinkMBB, SinkMBB->begin(), MIMD, TII->get(X86::PHI), DestReg)
35953 const MIMetadata MIMD(MI);
36076 BuildMI(ThisMBB, MIMD, TII->get(X86::JCC_1)).addMBB(SinkMBB).addImm(CC);
36105 const MIMetadata MIMD(MI);
36129 BuildMI(*MBB, {MI}, MIMD, TII->get(TargetOpcode::COPY), TmpStackPtr)
36133 BuildMI(*MBB, {MI}, MIMD, TII->get(Opc), FinalStackPtr)
36140 BuildMI(testMBB, MIMD,
36145 BuildMI(testMBB, MIMD, TII->get(X86::JCC_1))
36165 addRegOffset(BuildMI(blockMBB, MIMD, TII->get(XORMIOpc)), physSPReg, false, 0)
36168 BuildMI(blockMBB, MIMD, TII->get(getSUBriOpcode(TFI.Uses64BitFramePtr)),
36173 BuildMI(blockMBB, MIMD, TII->get(X86::JMP_1)).addMBB(testMBB);
36177 BuildMI(tailMBB, MIMD, TII->get(TargetOpcode::COPY),
36198 const MIMetadata MIMD(MI);
36253 BuildMI(BB, MIMD, TII->get(TargetOpcode::COPY), tmpSPVReg).addReg(physSPReg);
36254 BuildMI(BB, MIMD, TII->get(IsLP64 ? X86::SUB64rr:X86::SUB32rr), SPLimitVReg)
36256 BuildMI(BB, MIMD, TII->get(IsLP64 ? X86::CMP64mr:X86::CMP32mr))
36259 BuildMI(BB, MIMD, TII->get(X86::JCC_1)).addMBB(mallocMBB).addImm(X86::COND_G);
36263 BuildMI(bumpMBB, MIMD, TII->get(TargetOpcode::COPY), physSPReg)
36265 BuildMI(bumpMBB, MIMD, TII->get(TargetOpcode::COPY), bumpSPPtrVReg)
36267 BuildMI(bumpMBB, MIMD, TII->get(X86::JMP_1)).addMBB(continueMBB);
36273 BuildMI(mallocMBB, MIMD, TII->get(X86::MOV64rr), X86::RDI)
36275 BuildMI(mallocMBB, MIMD, TII->get(X86::CALL64pcrel32))
36281 BuildMI(mallocMBB, MIMD, TII->get(X86::MOV32rr), X86::EDI)
36283 BuildMI(mallocMBB, MIMD, TII->get(X86::CALL64pcrel32))
36289 BuildMI(mallocMBB, MIMD, TII->get(X86::SUB32ri), physSPReg).addReg(physSPReg)
36291 BuildMI(mallocMBB, MIMD, TII->get(X86::PUSH32r)).addReg(sizeVReg);
36292 BuildMI(mallocMBB, MIMD, TII->get(X86::CALLpcrel32))
36299 BuildMI(mallocMBB, MIMD, TII->get(X86::ADD32ri), physSPReg).addReg(physSPReg)
36302 BuildMI(mallocMBB, MIMD, TII->get(TargetOpcode::COPY), mallocPtrVReg)
36304 BuildMI(mallocMBB, MIMD, TII->get(X86::JMP_1)).addMBB(continueMBB);
36313 BuildMI(*continueMBB, continueMBB->begin(), MIMD, TII->get(X86::PHI),
36333 const MIMetadata MIMD(MI);
36358 BuildMI(*RestoreMBB, RestoreMBBI, MIMD, TII.get(X86::JMP_4)).addMBB(TargetMBB);
36371 const MIMetadata MIMD(MI);
36385 BuildMI(*BB, MI, MIMD, TII->get(X86::MOV64rm), X86::RDI)
36392 MIB = BuildMI(*BB, MI, MIMD, TII->get(X86::CALL64m));
36397 BuildMI(*BB, MI, MIMD, TII->get(X86::MOV32rm), X86::EAX)
36404 MIB = BuildMI(*BB, MI, MIMD, TII->get(X86::CALL32m));
36409 BuildMI(*BB, MI, MIMD, TII->get(X86::MOV32rm), X86::EAX)
36416 MIB = BuildMI(*BB, MI, MIMD, TII->get(X86::CALL32m));
36510 const MIMetadata MIMD(MI);
36547 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), AvailableReg)
36570 const MIMetadata MIMD(MI);
36584 BuildMI(*MBB, MI, MIMD, TII->get(XorRROpc))
36592 BuildMI(*MBB, MI, MIMD, TII->get(RdsspOpc), SSPCopyReg).addReg(ZReg);
36596 MIB = BuildMI(*MBB, MI, MIMD, TII->get(PtrStoreOpc));
36612 const MIMetadata MIMD(MI);
36687 MIB = BuildMI(*thisMBB, MI, MIMD, TII->get(X86::LEA64r), LabelReg)
36695 MIB = BuildMI(*thisMBB, MI, MIMD, TII->get(X86::LEA32r), LabelReg)
36705 MIB = BuildMI(*thisMBB, MI, MIMD, TII->get(PtrStoreOpc));
36723 MIB = BuildMI(*thisMBB, MI, MIMD, TII->get(X86::EH_SjLj_Setup))
36733 BuildMI(mainMBB, MIMD, TII->get(X86::MOV32r0), mainDstReg);
36737 BuildMI(*sinkMBB, sinkMBB->begin(), MIMD, TII->get(X86::PHI), DstReg)
36752 addRegOffset(BuildMI(restoreMBB, MIMD, TII->get(Opm), BasePtr),
36756 BuildMI(restoreMBB, MIMD, TII->get(X86::MOV32ri), restoreDstReg).addImm(1);
36757 BuildMI(restoreMBB, MIMD, TII->get(X86::JMP_1)).addMBB(sinkMBB);
36772 const MIMetadata MIMD(MI);
36832 BuildMI(checkSspMBB, MIMD, TII->get(X86::MOV32r0), ZReg);
36836 BuildMI(checkSspMBB, MIMD, TII->get(X86::SUBREG_TO_REG), TmpZReg)
36846 BuildMI(checkSspMBB, MIMD, TII->get(RdsspOpc), SSPCopyReg).addReg(ZReg);
36851 BuildMI(checkSspMBB, MIMD, TII->get(TestRROpc))
36854 BuildMI(checkSspMBB, MIMD, TII->get(X86::JCC_1))
36865 BuildMI(fallMBB, MIMD, TII->get(PtrLoadOpc), PrevSSPReg);
36881 BuildMI(fallMBB, MIMD, TII->get(SubRROpc), SspSubReg)
36886 BuildMI(fallMBB, MIMD, TII->get(X86::JCC_1))
36896 BuildMI(fixShadowMBB, MIMD, TII->get(ShrRIOpc), SspFirstShrReg)
36902 BuildMI(fixShadowMBB, MIMD, TII->get(IncsspOpc)).addReg(SspFirstShrReg);
36906 BuildMI(fixShadowMBB, MIMD, TII->get(ShrRIOpc), SspSecondShrReg)
36911 BuildMI(fixShadowMBB, MIMD, TII->get(X86::JCC_1))
36920 BuildMI(fixShadowLoopPrepareMBB, MIMD, TII->get(ShlR1Opc), SspAfterShlReg)
36927 BuildMI(fixShadowLoopPrepareMBB, MIMD, TII->get(MovRIOpc), Value128InReg)
36935 BuildMI(fixShadowLoopMBB, MIMD, TII->get(X86::PHI), CounterReg)
36942 BuildMI(fixShadowLoopMBB, MIMD, TII->get(IncsspOpc)).addReg(Value128InReg);
36946 BuildMI(fixShadowLoopMBB, MIMD, TII->get(DecROpc), DecReg).addReg(CounterReg);
36949 BuildMI(fixShadowLoopMBB, MIMD, TII->get(X86::JCC_1))
36961 const MIMetadata MIMD(MI);
36997 MIB = BuildMI(*thisMBB, MI, MIMD, TII->get(PtrLoadOpc), FP);
37010 MIB = BuildMI(*thisMBB, MI, MIMD, TII->get(PtrLoadOpc), Tmp);
37024 MIB = BuildMI(*thisMBB, MI, MIMD, TII->get(PtrLoadOpc), SP);
37036 BuildMI(*thisMBB, MI, MIMD, TII->get(IJmpOpc)).addReg(Tmp);
37046 const MIMetadata MIMD(MI);
37069 BuildMI(*MBB, MI, MIMD, TII->get(X86::LEA64r), VR)
37076 BuildMI(*MBB, MI, MIMD, TII->get(X86::LEA32r), VR)
37084 MachineInstrBuilder MIB = BuildMI(*MBB, MI, MIMD, TII->get(Op));
37095 const MIMetadata MIMD(MI);
37150 BuildMI(TrapBB, MIMD, TII->get(X86::TRAP));
37182 addRegOffset(BuildMI(DispatchBB, MIMD, TII->get(Op), BP), FP, true,
37186 BuildMI(DispatchBB, MIMD, TII->get(X86::NOOP))
37192 addFrameReference(BuildMI(DispatchBB, MIMD, TII->get(X86::MOV32rm), IReg), FI,
37194 BuildMI(DispatchBB, MIMD, TII->get(X86::CMP32ri))
37197 BuildMI(DispatchBB, MIMD, TII->get(X86::JCC_1))
37206 BuildMI(DispContBB, MIMD, TII->get(X86::LEA64r), BReg)
37213 BuildMI(DispContBB, MIMD, TII->get(TargetOpcode::SUBREG_TO_REG), IReg64)
37221 BuildMI(DispContBB, MIMD, TII->get(X86::JMP64m))
37234 BuildMI(DispContBB, MIMD, TII->get(X86::MOV32rm), OReg)
37241 BuildMI(DispContBB, MIMD, TII->get(X86::MOVSX64rr32), OReg64)
37244 BuildMI(DispContBB, MIMD, TII->get(X86::ADD64rr), TReg)
37248 BuildMI(DispContBB, MIMD, TII->get(X86::JMP64r)).addReg(TReg);
37256 BuildMI(DispContBB, MIMD, TII->get(X86::JMP32m))
37329 const MIMetadata MIMD(MI);
37336 BuildMI(MF, MIMD, TII.get(AdjStackDown)).addImm(0).addImm(0).addImm(0);
37342 BuildMI(MF, MIMD, TII.get(AdjStackUp)).addImm(0).addImm(0);
37353 const MIMetadata MIMD(MI);
37415 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::FNSTCW16m)),
37420 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::MOVZX32rm16), OldCW),
37426 BuildMI(*BB, MI, MIMD, TII->get(X86::OR32ri), NewCW)
37433 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), NewCW16)
37439 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::MOV16mr)),
37444 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::FLDCW16m)),
37449 BuildMI(*BB, MI, MIMD, TII->get(X86::ADD_Fp80))
37454 BuildMI(*BB, MI, MIMD, TII->get(X86::ADD_Fp80m32))
37465 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::FLDCW16m)),
37485 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::FNSTCW16m)),
37490 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::MOVZX32rm16), OldCW),
37495 BuildMI(*BB, MI, MIMD, TII->get(X86::OR32ri), NewCW)
37501 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), NewCW16)
37507 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::MOV16mr)),
37512 addFrameReference(BuildMI(*BB, MI, MIMD,
37533 addFullAddress(BuildMI(*BB, MI, MIMD, TII->get(Opc)), AM)
37537 addFrameReference(BuildMI(*BB, MI, MIMD, TII->get(X86::FLDCW16m)),
37624 BuildMI(*BB, *MBBI, MIMD, TII->get(X86::LEA32r), computedAddrVReg), AM);
37640 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), SaveRBX)
37644 BuildMI(*BB, MI, MIMD, TII->get(X86::LCMPXCHG16B_SAVE_RBX), Dst);
37651 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), X86::RBX)
37654 BuildMI(*BB, MI, MIMD, TII->get(X86::LCMPXCHG16B));
37668 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), X86::ECX)
37670 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), X86::EAX)
37672 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), X86::EBX)
37674 BuildMI(*BB, MI, MIMD, TII->get(X86::MWAITXrrr));
37681 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), X86::ECX)
37683 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), X86::EAX)
37689 BuildMI(*BB, MI, MIMD, TII->get(TargetOpcode::COPY), SaveRBX)
37693 BuildMI(*BB, MI, MIMD, TII->get(X86::MWAITX_SAVE_RBX))
37710 BuildMI(*BB, MI, MIMD, TII->get(X86::SUB32ri), X86::ESP)
37725 addRegOffset(BuildMI(*BB, MI, MIMD, TII->get(X86::LEA32r),
37792 MachineInstrBuilder MIB = BuildMI(*BB, MI, MIMD, TII->get(Opc));
37803 BuildMI(*BB, MI, MIMD, TII->get(X86::TILEZERO), TMMImmToTMMReg(Imm));
37841 MachineInstrBuilder MIB = BuildMI(*BB, MI, MIMD, TII->get(Opc));