Lines Matching defs:IsSub

51646 static SDValue combineAddOrSubToADCOrSBB(bool IsSub, const SDLoc &DL, EVT VT,
51674     if ((!IsSub && CC == X86::COND_AE && ConstantX->isAllOnes()) ||
51675         (IsSub && CC == X86::COND_B && ConstantX->isZero())) {
51684     if ((!IsSub && CC == X86::COND_BE && ConstantX->isAllOnes()) ||
51685         (IsSub && CC == X86::COND_A && ConstantX->isZero())) {
51706     return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL,
51728       return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL,
51737     return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL,
51758       return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL,
51782     if ((IsSub && CC == X86::COND_NE && ConstantX->isZero()) ||
51783         (!IsSub && CC == X86::COND_E && ConstantX->isAllOnes())) {
51796     if ((IsSub && CC == X86::COND_E && ConstantX->isZero()) ||
51797         (!IsSub && CC == X86::COND_NE && ConstantX->isAllOnes())) {
51818     return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL, VTs, X,
51823   return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL, VTs, X,
51832   bool IsSub = N->getOpcode() == ISD::SUB;
51837   if (SDValue ADCOrSBB = combineAddOrSubToADCOrSBB(IsSub, DL, VT, X, Y, DAG))
51841   if (SDValue ADCOrSBB = combineAddOrSubToADCOrSBB(IsSub, DL, VT, Y, X, DAG)) {
51842     if (IsSub)
51864       bool IsSub = Opc == ISD::XOR;
51866       if (IsSub ? N1COdd : !N1COdd)
51867         if (SDValue R = combineAddOrSubToADCOrSBB(IsSub, DL, VT, N1, N0, DAG))
56614   bool IsSub = X86ISD::SUB == N->getOpcode();
56615   unsigned GenericOpc = IsSub ? ISD::SUB : ISD::ADD;
56617   if (IsSub && isOneConstant(N->getOperand(1)) && !N->hasAnyUseOfValue(0))
56648   return combineAddOrSubToADCOrSBB(IsSub, DL, VT, LHS, RHS, DAG,