Lines Matching defs:ExtractVT

17690     MVT ExtractVT = MVT::getVectorVT(MVT::i1, SubvecElts);
17692 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ExtractVT, Src == 0 ? V1 : V2,
45471 EVT ExtractVT = Extract->getValueType(0);
45472 if (ExtractVT != MVT::i16 && ExtractVT != MVT::i8)
45484 if (SrcSVT != ExtractVT || (SrcVT.getSizeInBits() % 128) != 0)
45497 assert(((SrcVT == MVT::v8i16 && ExtractVT == MVT::i16) ||
45498 (SrcVT == MVT::v16i8 && ExtractVT == MVT::i8)) &&
45504 unsigned MaskEltsBits = ExtractVT.getSizeInBits();
45519 if (ExtractVT == MVT::i8) {
45534 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ExtractVT, MinPos,
45545 EVT ExtractVT = Extract->getValueType(0);
45546 unsigned BitWidth = ExtractVT.getSizeInBits();
45547 if (ExtractVT != MVT::i64 && ExtractVT != MVT::i32 && ExtractVT != MVT::i16 &&
45548 ExtractVT != MVT::i8 && ExtractVT != MVT::i1)
45554 if (!Match && ExtractVT == MVT::i1)
45572 if (ExtractVT == MVT::i1) {
45588 return DAG.getNode(ISD::TRUNCATE, DL, ExtractVT,
45654 return DAG.getZExtOrTrunc(Result, DL, ExtractVT);
45674 SDValue Zext = DAG.getZExtOrTrunc(Setcc, DL, ExtractVT);
45675 return DAG.getNegative(Zext, DL, ExtractVT);
45683 EVT ExtractVT = Extract->getValueType(0);
45686 if (ExtractVT != MVT::i32)
45742 EVT::getVectorVT(*DAG.getContext(), ExtractVT,
45743 DpVT.getSizeInBits() / ExtractVT.getSizeInBits());
45745 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ExtractVT, DP,
45755 EVT ExtractVT = Extract->getValueType(0);
45758 if (ExtractVT != MVT::i32 && ExtractVT != MVT::i64)
45814 unsigned ExtractSizeInBits = ExtractVT.getSizeInBits();
45816 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), ExtractVT,
45819 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ExtractVT, SAD,
45957 MVT ExtractVT = MVT::getVectorVT(SrcSVT.getSimpleVT(), 128 / SrcEltBits);
45958 return DAG.getNode(N->getOpcode(), dl, VT, DAG.getBitcast(ExtractVT, Src),
46032 EVT ExtractVT;
46035 ExtractVT = SrcVT;
46045 ExtractVT = EVT::getVectorVT(*DAG.getContext(), ExtractSVT, Mask.size());
46046 assert(SrcVT.getSizeInBits() == ExtractVT.getSizeInBits() &&
46060 if (SDValue V = GetLegalExtract(SrcOp, ExtractVT, ExtractIdx))
46063 if (N->getOpcode() == ISD::EXTRACT_VECTOR_ELT && ExtractVT == SrcVT)