Lines Matching defs:CC0

23729         unsigned CC0, CC1;
23732           CC0 = 3; // UNORD
23737           CC0 = 7; // ORD
23746               {Chain, Op0, Op1, DAG.getTargetConstant(CC0, dl, MVT::i8)});
23754               Opc, dl, VT, Op0, Op1, DAG.getTargetConstant(CC0, dl, MVT::i8));
47394     // Similar to DAGCombine's select(or(CC0,CC1),X,Y) fold but for legal types.
47929 static bool checkBoolTestAndOrSetCCCombine(SDValue Cond, X86::CondCode &CC0,
47961   CC0 = (X86::CondCode)SetCC0->getConstantOperandVal(0);
48655     X86::CondCode CC0, CC1;
48657     if (checkBoolTestAndOrSetCCCombine(Cond, CC0, CC1, Flags, isAndSetCC)) {
48660         CC0 = X86::GetOppositeBranchCondition(CC0);
48665                         DAG.getTargetConstant(CC0, DL, MVT::i8), Flags};
50449   ISD::CondCode CC0 = cast<CondCodeSDNode>(N0.getOperand(2))->get();
50455       !(cheapX86FSETCC_SSE(CC0) && cheapX86FSETCC_SSE(CC1)))
50472   SDValue Setcc0 = DAG.getSetCC(DL, BoolVecVT, Vec00, Vec01, CC0);
51028   X86::CondCode CC0 =
51031   if (CC0 == X86::COND_P || CC0 == X86::COND_NP)
51037   // evaluates to true. So we need to inverse CC0 as SrcCC when the logic
51040       IsOR ? DAG.getTargetConstant(X86::GetOppositeBranchCondition(CC0),