Lines Matching defs:IsLP64

56   IsLP64 = STI.isTarget64BitLP64();
108 static unsigned getSUBriOpcode(bool IsLP64) {
109   return IsLP64 ? X86::SUB64ri32 : X86::SUB32ri;
112 static unsigned getADDriOpcode(bool IsLP64) {
113   return IsLP64 ? X86::ADD64ri32 : X86::ADD32ri;
116 static unsigned getSUBrrOpcode(bool IsLP64) {
117   return IsLP64 ? X86::SUB64rr : X86::SUB32rr;
120 static unsigned getADDrrOpcode(bool IsLP64) {
121   return IsLP64 ? X86::ADD64rr : X86::ADD32rr;
124 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
125   return IsLP64 ? X86::AND64ri32 : X86::AND32ri;
128 static unsigned getLEArOpcode(bool IsLP64) {
129   return IsLP64 ? X86::LEA64r : X86::LEA32r;
3199 static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64,
3212     if (IsLP64)
3248   unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
3285     allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
3298       TlsOffset = IsLP64 ? 0x70 : 0x40;
3316       ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
3318       BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r),
3326     BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm))
3378         ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
3382         ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
3424     const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
3425     const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
3426     const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
3427     const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
3432     BuildMI(allocMBB, DL, TII.get(getMOVriOpcode(IsLP64, StackSize)), Reg10)
3435             TII.get(getMOVriOpcode(IsLP64, X86FI->getArgumentStackSize())),
3650     ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);