Lines Matching defs:FramePtr

480   const Register FramePtr = TRI->getFrameRegister(MF);
482 STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64))
483 : FramePtr;
522 Register FramePtr = TRI->getFrameRegister(MF);
525 ? Register(getX86SubSuperRegister(FramePtr, 64))
526 : FramePtr;
546 Register FramePtr = TRI->getFrameRegister(MF);
549 ? Register(getX86SubSuperRegister(FramePtr, 64))
550 : FramePtr;
1587 Register FramePtr = TRI->getFrameRegister(MF);
1589 STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64))
1590 : FramePtr;
1790 // Change the rule for the FramePtr to be an "offset" rule.
1802 .addImm(FramePtr)
1837 BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr)
1855 FramePtr)
1885 // .cv_fpo_setframe $FramePtr
1888 .addImm(FramePtr)
2093 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
2096 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
2104 .addImm(FramePtr)
2200 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), FramePtr, true,
2218 .addReg(FramePtr)
2389 Register FramePtr = TRI->getFrameRegister(MF);
2391 Is64BitILP32 ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr;
2553 // - lea SEHAllocationSize(%FramePtr), %rsp
2555 // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
2560 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), FramePtr,
2565 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr).addReg(FramePtr);
3936 Register FramePtr = TRI->getFrameRegister(MF);
3959 if (UsedReg == FramePtr) {
3962 BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
3963 .addReg(FramePtr)
3973 FramePtr, false, EndOffset)
3981 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
3985 llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");