Lines Matching defs:RetVT
109 bool X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I);
111 bool X86FastEmitSSESelect(MVT RetVT, const Instruction *I);
113 bool X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I);
234 MVT RetVT;
238 if (!isTypeLegal(RetTy, RetVT))
241 if (RetVT != MVT::i32 && RetVT != MVT::i64)
2023 bool X86FastISel::X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I) {
2029 if (RetVT < MVT::i16 || RetVT > MVT::i64)
2033 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2149 bool X86FastISel::X86FastEmitSSESelect(MVT RetVT, const Instruction *I) {
2158 !((Subtarget->hasSSE1() && RetVT == MVT::f32) ||
2159 (Subtarget->hasSSE2() && RetVT == MVT::f64)))
2194 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2203 (RetVT == MVT::f32) ? X86::VCMPSSZrri : X86::VCMPSDZrri;
2216 (RetVT == MVT::f32) ? X86::VMOVSSZrrk : X86::VMOVSDZrrk;
2233 (RetVT == MVT::f32) ? X86::VCMPSSrri : X86::VCMPSDrri;
2235 (RetVT == MVT::f32) ? X86::VBLENDVPSrrr : X86::VBLENDVPDrrr;
2252 switch (RetVT.SimpleTy) {
2271 bool X86FastISel::X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I) {
2275 switch (RetVT.SimpleTy) {
2337 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2346 MVT RetVT;
2347 if (!isTypeLegal(I->getType(), RetVT))
2364 const TargetRegisterClass *RC = TLI.getRegClassFor(RetVT);
2375 if (X86FastEmitCMoveSelect(RetVT, I))
2379 if (X86FastEmitSSESelect(RetVT, I))
2384 if (X86FastEmitPseudoSelect(RetVT, I))