Lines Matching defs:CondReg
2105 // Selects operate on i1, however, CondReg is 8 bits width and may contain
2110 Register CondReg = getRegForValue(Cond);
2111 if (CondReg == 0)
2115 if (MRI.getRegClass(CondReg) == &X86::VK1RegClass) {
2116 unsigned KCondReg = CondReg;
2117 CondReg = createResultReg(&X86::GR32RegClass);
2119 TII.get(TargetOpcode::COPY), CondReg)
2121 CondReg = fastEmitInst_extractsubreg(MVT::i8, CondReg, X86::sub_8bit);
2124 .addReg(CondReg)
2311 Register CondReg = getRegForValue(Cond);
2312 if (CondReg == 0)
2316 if (MRI.getRegClass(CondReg) == &X86::VK1RegClass) {
2317 unsigned KCondReg = CondReg;
2318 CondReg = createResultReg(&X86::GR32RegClass);
2320 TII.get(TargetOpcode::COPY), CondReg)
2322 CondReg = fastEmitInst_extractsubreg(MVT::i8, CondReg, X86::sub_8bit);
2325 .addReg(CondReg)