Lines Matching refs:Opcode

132 static bool isXMMLoadOpcode(unsigned Opcode) {
133   return Opcode == X86::MOVUPSrm || Opcode == X86::MOVAPSrm ||
134          Opcode == X86::VMOVUPSrm || Opcode == X86::VMOVAPSrm ||
135          Opcode == X86::VMOVUPDrm || Opcode == X86::VMOVAPDrm ||
136          Opcode == X86::VMOVDQUrm || Opcode == X86::VMOVDQArm ||
137          Opcode == X86::VMOVUPSZ128rm || Opcode == X86::VMOVAPSZ128rm ||
138          Opcode == X86::VMOVUPDZ128rm || Opcode == X86::VMOVAPDZ128rm ||
139          Opcode == X86::VMOVDQU64Z128rm || Opcode == X86::VMOVDQA64Z128rm ||
140          Opcode == X86::VMOVDQU32Z128rm || Opcode == X86::VMOVDQA32Z128rm;
142 static bool isYMMLoadOpcode(unsigned Opcode) {
143   return Opcode == X86::VMOVUPSYrm || Opcode == X86::VMOVAPSYrm ||
144          Opcode == X86::VMOVUPDYrm || Opcode == X86::VMOVAPDYrm ||
145          Opcode == X86::VMOVDQUYrm || Opcode == X86::VMOVDQAYrm ||
146          Opcode == X86::VMOVUPSZ256rm || Opcode == X86::VMOVAPSZ256rm ||
147          Opcode == X86::VMOVUPDZ256rm || Opcode == X86::VMOVAPDZ256rm ||
148          Opcode == X86::VMOVDQU64Z256rm || Opcode == X86::VMOVDQA64Z256rm ||
149          Opcode == X86::VMOVDQU32Z256rm || Opcode == X86::VMOVDQA32Z256rm;
152 static bool isPotentialBlockedMemCpyLd(unsigned Opcode) {
153   return isXMMLoadOpcode(Opcode) || isYMMLoadOpcode(Opcode);
208 static bool isPotentialBlockingStoreInst(unsigned Opcode, unsigned LoadOpcode) {
210   PBlock |= Opcode == X86::MOV64mr || Opcode == X86::MOV64mi32 ||
211             Opcode == X86::MOV32mr || Opcode == X86::MOV32mi ||
212             Opcode == X86::MOV16mr || Opcode == X86::MOV16mi ||
213             Opcode == X86::MOV8mr || Opcode == X86::MOV8mi;
215     PBlock |= Opcode == X86::VMOVUPSmr || Opcode == X86::VMOVAPSmr ||
216               Opcode == X86::VMOVUPDmr || Opcode == X86::VMOVAPDmr ||
217               Opcode == X86::VMOVDQUmr || Opcode == X86::VMOVDQAmr ||
218               Opcode == X86::VMOVUPSZ128mr || Opcode == X86::VMOVAPSZ128mr ||
219               Opcode == X86::VMOVUPDZ128mr || Opcode == X86::VMOVAPDZ128mr ||
220               Opcode == X86::VMOVDQU64Z128mr ||
221               Opcode == X86::VMOVDQA64Z128mr ||
222               Opcode == X86::VMOVDQU32Z128mr || Opcode == X86::VMOVDQA32Z128mr;
256     llvm_unreachable("Unexpected Load Instruction Opcode");
285     llvm_unreachable("Unexpected Load Instruction Opcode");