Lines Matching refs:opcode
24 // 2. Read the opcode, and determine what kind of opcode it is. The
30 // 3. Depending on the opcode type, look in one of four ClassDecision structures
31 // (X86DisassemblerDecoderCommon.h). Use the opcode class to determine which
32 // OpcodeDecision (ibid.) to look the opcode in. Look up the opcode, to get
52 // the main opcode. This is orthogonal from its meaning (an GPR or an XMM
107 // given a particular opcode.
112 // Specifies which opcode->instruction tables to look at given
124 uint8_t opcode, uint8_t modRM) {
129 dec = &ONEBYTE_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
132 dec = &TWOBYTE_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
135 dec = &THREEBYTE38_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
138 dec = &THREEBYTE3A_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
141 dec = &XOP8_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
144 dec = &XOP9_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
147 dec = &XOPA_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
151 &THREEDNOW_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
154 dec = &MAP4_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
157 dec = &MAP5_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
160 dec = &MAP6_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
163 dec = &MAP7_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
229 // If we fail reading prefixes, just stop here and let the opcode reader
234 // If the byte is a LOCK/REP/REPNE prefix and not a part of the opcode, then
252 // - it is followed by a "mov mem, reg" (opcode 0x88/0x89) or
253 // "mov mem, imm" (opcode 0xc6/0xc7) instructions.
926 // Read the opcode (except the ModR/M byte in the case of extended or escape
942 return consume(insn, insn->opcode);
945 return consume(insn, insn->opcode);
948 return consume(insn, insn->opcode);
951 return consume(insn, insn->opcode);
954 return consume(insn, insn->opcode);
957 return consume(insn, insn->opcode);
960 return consume(insn, insn->opcode);
971 return consume(insn, insn->opcode);
974 return consume(insn, insn->opcode);
977 return consume(insn, insn->opcode);
980 return consume(insn, insn->opcode);
983 return consume(insn, insn->opcode);
986 return consume(insn, insn->opcode);
990 return consume(insn, insn->opcode);
1000 return consume(insn, insn->opcode);
1003 return consume(insn, insn->opcode);
1006 return consume(insn, insn->opcode);
1009 // m bit indicates opcode map 1
1011 return consume(insn, insn->opcode);
1041 // Consume operands before the opcode to comply with the 3DNow encoding
1054 // The opcode with mandatory prefix must start with opcode escape.
1058 // At this point we have consumed the full opcode.
1060 insn->opcode = current;
1141 .modRMDecisions[insn->opcode]
1146 decode(insn->opcodeType, insnCtx, insn->opcode, insn->modRM);
1148 *instructionID = decode(insn->opcodeType, insnCtx, insn->opcode, 0);
1157 if (insn->opcode == 0x83 && regFromModRM(insn->modRM) == 7)
1159 switch (insn->opcode & 0xfe) {
1181 switch (insn->opcode) {
1301 if (insn->repeatPrefix == 0xf3 && (insn->opcode == 0x90))
1337 (insn->opcode == 0xA1 || (insn->opcode & 0xf0) == 0x50))
1343 if (insn->opcodeType == ONEBYTE && insn->opcode == 0xE3)
1349 (insn->opcode == 0xE8 || insn->opcode == 0xE9))
1353 insn->opcode >= 0x80 && insn->opcode <= 0x8F)
1366 // select register size and cases where its a required part of the opcode.
1383 // If not a 64-bit instruction. Switch the opcode.
1397 if ((insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0)) ||
1398 (insn->opcodeType == TWOBYTE && (insn->opcode == 0xAE)) ||
1399 (insn->opcodeType == THREEBYTE_38 && insn->opcode == 0xF8) ||
1400 (insn->opcodeType == MAP4 && insn->opcode == 0xF8)) {
1412 if (insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0))
1460 if (insn->opcodeType == ONEBYTE && insn->opcode == 0x90 &&
1470 // Borrow opcode from one of the other XCHGar opcodes
1471 insn->opcode = 0x91;
1475 insn->opcode = 0x90;
1485 insn->opcode = 0x90;
1499 // Read an operand from the opcode field of an instruction and interprets it
1502 // @param insn - the instruction whose opcode field is to be read.
1517 (insn->opcode & 7)));
1618 // Read an mask register from the opcode field of an instruction.
1620 // @param insn - The instruction whose opcode field is to be read.
1779 insn->immediates[1] = insn->opcode & 0xf;
1911 Insn.opcode != 0x90)
2457 // opcode to those instead of the rep and repne opcodes.