Lines Matching defs:LowOpcode

97   unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm());
98   assert(HighOpcode && LowOpcode && "Both offsets should be in range");
100   LowPartMI->setDesc(get(LowOpcode));
150 // MI is an RI-style pseudo instruction.  Replace it with LowOpcode
152 // is a high GR32.  ConvertHigh is true if LowOpcode takes a signed operand
154 // MI has the same kind of operand as LowOpcode, so needs to be converted
156 void SystemZInstrInfo::expandRIPseudo(MachineInstr &MI, unsigned LowOpcode,
161   MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode));
168 // followed by HighOpcode or LowOpcode, depending on whether the target
170 void SystemZInstrInfo::expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
186     MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
191 // MI is an RXY-style pseudo instruction.  Replace it with LowOpcode
194 void SystemZInstrInfo::expandRXYPseudo(MachineInstr &MI, unsigned LowOpcode,
198       SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode,
204 // (source or destination) operand.  Replace it with LowOpcode if the
206 void SystemZInstrInfo::expandLOCPseudo(MachineInstr &MI, unsigned LowOpcode,
209   unsigned Opcode = SystemZ::isHighReg(Reg) ? HighOpcode : LowOpcode;
214 // of one GRX32 into another.  Replace it with LowOpcode if both operands
216 void SystemZInstrInfo::expandZExtPseudo(MachineInstr &MI, unsigned LowOpcode,
220                MI.getOperand(0).getReg(), MI.getOperand(1).getReg(), LowOpcode,