Lines Matching defs:Disp
59 // Base + Disp + Index + (IncludesDynAlloc ? ADJDYNALLOC : 0)
61 int64_t Disp;
66 : Form(form), DR(dr), Disp(0), IncludesDynAlloc(false) {}
91 errs() << " Disp " << Disp;
159 SDValue &Base, SDValue &Disp) const;
161 SDValue &Base, SDValue &Disp, SDValue &Index) const;
165 // Base and Disp respectively.
167 SDValue &Base, SDValue &Disp) const;
171 // base and displacement in Base and Disp respectively.
173 SDValue &Base, SDValue &Disp) const;
177 // displacement and index in Base, Disp and Index respectively.
180 SDValue &Base, SDValue &Disp, SDValue &Index) const;
192 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const {
193 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp);
195 bool selectBDAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
196 return selectBDAddr(SystemZAddressingMode::Disp12Pair, Addr, Base, Disp);
198 bool selectBDAddr20Only(SDValue Addr, SDValue &Base, SDValue &Disp) const {
199 return selectBDAddr(SystemZAddressingMode::Disp20Only, Addr, Base, Disp);
201 bool selectBDAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
202 return selectBDAddr(SystemZAddressingMode::Disp20Pair, Addr, Base, Disp);
206 bool selectMVIAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
207 return selectMVIAddr(SystemZAddressingMode::Disp12Pair, Addr, Base, Disp);
209 bool selectMVIAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
210 return selectMVIAddr(SystemZAddressingMode::Disp20Pair, Addr, Base, Disp);
214 bool selectBDXAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp,
218 Addr, Base, Disp, Index);
220 bool selectBDXAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
224 Addr, Base, Disp, Index);
226 bool selectDynAlloc12Only(SDValue Addr, SDValue &Base, SDValue &Disp,
230 Addr, Base, Disp, Index);
232 bool selectBDXAddr20Only(SDValue Addr, SDValue &Base, SDValue &Disp,
236 Addr, Base, Disp, Index);
238 bool selectBDXAddr20Only128(SDValue Addr, SDValue &Base, SDValue &Disp,
242 Addr, Base, Disp, Index);
244 bool selectBDXAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
248 Addr, Base, Disp, Index);
250 bool selectLAAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
254 Addr, Base, Disp, Index);
256 bool selectLAAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
260 Addr, Base, Disp, Index);
266 // in Base, Disp and Index respectively.
268 SDValue &Disp, SDValue &Index) const;
467 int64_t TestDisp = AM.Disp + Op1;
470 AM.Disp = TestDisp;
542 // Return true if Base + Disp + Index should be performed by LA(Y).
543 static bool shouldUseLA(SDNode *Base, int64_t Disp, SDNode *Index) {
554 if (Disp) {
561 if (isUInt<12>(Disp))
566 if (!isInt<16>(Disp))
618 !shouldUseLA(AM.Base.getNode(), AM.Disp, AM.Index.getNode()))
622 if (!isValidDisp(AM.DR, AM.Disp))
654 SDValue &Disp) const {
674 Disp = CurDAG->getSignedTargetConstant(AM.Disp, SDLoc(Base), VT);
679 SDValue &Disp,
681 getAddressOperands(AM, VT, Base, Disp);
691 SDValue &Disp) const {
696 getAddressOperands(AM, Addr.getValueType(), Base, Disp);
702 SDValue &Disp) const {
707 getAddressOperands(AM, Addr.getValueType(), Base, Disp);
714 SDValue &Disp, SDValue &Index) const {
719 getAddressOperands(AM, Addr.getValueType(), Base, Disp, Index);
725 SDValue &Disp,
728 if (selectBDXAddr12Only(Addr, Regs[0], Disp, Regs[1]) &&
1263 SDValue Base, Disp, Index;
1264 if (!selectBDVAddr12Only(Load->getBasePtr(), ElemV, Base, Disp, Index) ||
1270 N->getOperand(0), Base, Disp, Index,
1297 SDValue Base, Disp, Index;
1298 if (!selectBDVAddr12Only(Store->getBasePtr(), ElemV, Base, Disp, Index) ||
1304 Vec, Base, Disp, Index, CurDAG->getTargetConstant(Elem, DL, MVT::i32),
1458 SDValue Base, Disp;
1459 if (!selectBDAddr20Only(StoreNode->getBasePtr(), Base, Disp))
1462 SDValue Ops[] = { Base, Disp, Operand, InputChain };
1813 SDValue Base, Disp, Index;
1851 if (selectBDXAddr(Form, DispRange, Op, Base, Disp, Index)) {
1876 OutOps.push_back(Disp);