Lines Matching defs:SPCC
1518 static SPCC::CondCodes intCondCCodeToRcond(ISD::CondCode CC) {
1523 return SPCC::REG_Z;
1525 return SPCC::REG_NZ;
1527 return SPCC::REG_LZ;
1529 return SPCC::REG_GZ;
1531 return SPCC::REG_LEZ;
1533 return SPCC::REG_GEZ;
1539 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
1542 case ISD::SETEQ: return SPCC::ICC_E;
1543 case ISD::SETNE: return SPCC::ICC_NE;
1544 case ISD::SETLT: return SPCC::ICC_L;
1545 case ISD::SETGT: return SPCC::ICC_G;
1546 case ISD::SETLE: return SPCC::ICC_LE;
1547 case ISD::SETGE: return SPCC::ICC_GE;
1548 case ISD::SETULT: return SPCC::ICC_CS;
1549 case ISD::SETULE: return SPCC::ICC_LEU;
1550 case ISD::SETUGT: return SPCC::ICC_GU;
1551 case ISD::SETUGE: return SPCC::ICC_CC;
1557 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
1561 case ISD::SETOEQ: return SPCC::FCC_E;
1563 case ISD::SETUNE: return SPCC::FCC_NE;
1565 case ISD::SETOLT: return SPCC::FCC_L;
1567 case ISD::SETOGT: return SPCC::FCC_G;
1569 case ISD::SETOLE: return SPCC::FCC_LE;
1571 case ISD::SETOGE: return SPCC::FCC_GE;
1572 case ISD::SETULT: return SPCC::FCC_UL;
1573 case ISD::SETULE: return SPCC::FCC_ULE;
1574 case ISD::SETUGT: return SPCC::FCC_UG;
1575 case ISD::SETUGE: return SPCC::FCC_UGE;
1576 case ISD::SETUO: return SPCC::FCC_U;
1577 case ISD::SETO: return SPCC::FCC_O;
1578 case ISD::SETONE: return SPCC::FCC_LG;
1579 case ISD::SETUEQ: return SPCC::FCC_UE;
2070 // set LHS/RHS and SPCC to the LHS/RHS of the setcc and SPCC to the condition.
2072 ISD::CondCode CC, unsigned &SPCC) {
2082 SPCC = LHS.getConstantOperandVal(2);
2388 unsigned &SPCC, const SDLoc &DL,
2393 switch(SPCC) {
2395 case SPCC::FCC_E : LibCall = is64Bit? "_Qp_feq" : "_Q_feq"; break;
2396 case SPCC::FCC_NE : LibCall = is64Bit? "_Qp_fne" : "_Q_fne"; break;
2397 case SPCC::FCC_L : LibCall = is64Bit? "_Qp_flt" : "_Q_flt"; break;
2398 case SPCC::FCC_G : LibCall = is64Bit? "_Qp_fgt" : "_Q_fgt"; break;
2399 case SPCC::FCC_LE : LibCall = is64Bit? "_Qp_fle" : "_Q_fle"; break;
2400 case SPCC::FCC_GE : LibCall = is64Bit? "_Qp_fge" : "_Q_fge"; break;
2401 case SPCC::FCC_UL :
2402 case SPCC::FCC_ULE:
2403 case SPCC::FCC_UG :
2404 case SPCC::FCC_UGE:
2405 case SPCC::FCC_U :
2406 case SPCC::FCC_O :
2407 case SPCC::FCC_LG :
2408 case SPCC::FCC_UE : LibCall = is64Bit? "_Qp_cmp" : "_Q_cmp"; break;
2428 switch(SPCC) {
2431 SPCC = SPCC::ICC_NE;
2434 case SPCC::FCC_UL : {
2438 SPCC = SPCC::ICC_NE;
2441 case SPCC::FCC_ULE: {
2443 SPCC = SPCC::ICC_NE;
2446 case SPCC::FCC_UG : {
2448 SPCC = SPCC::ICC_G;
2451 case SPCC::FCC_UGE: {
2453 SPCC = SPCC::ICC_NE;
2457 case SPCC::FCC_U : {
2459 SPCC = SPCC::ICC_E;
2462 case SPCC::FCC_O : {
2464 SPCC = SPCC::ICC_NE;
2467 case SPCC::FCC_LG : {
2471 SPCC = SPCC::ICC_NE;
2474 case SPCC::FCC_UE : {
2478 SPCC = SPCC::ICC_E;
2624 unsigned Opc, SPCC = ~0U;
2628 LookThroughSetCC(LHS, RHS, CC, SPCC);
2643 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2652 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2653 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2658 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2663 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag);
2675 unsigned Opc, SPCC = ~0U;
2679 LookThroughSetCC(LHS, RHS, CC, SPCC);
2703 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2706 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2707 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2713 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2717 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag);
3255 unsigned CC = (SPCC::CondCodes)MI.getOperand(3).getImm();