Lines Matching defs:MO
65 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
109 const MCOperand &MO = MI.getOperand(SymOpNo);
110 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI);
119 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
122 if (MO.isReg())
123 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
125 if (MO.isImm())
126 return MO.getImm();
128 assert(MO.isExpr());
129 const MCExpr *Expr = MO.getExpr();
148 const MCOperand &MO = MI.getOperand(OpNo);
150 if (MO.isImm())
151 return MO.getImm();
153 assert(MO.isExpr() &&
156 const MCExpr *Expr = MO.getExpr();
179 const MCOperand &MO = MI.getOperand(OpNo);
180 const MCExpr *Expr = MO.getExpr();
206 const MCOperand &MO = MI.getOperand(OpNo);
207 if (MO.isReg() || MO.isImm())
208 return getMachineOpValue(MI, MO, Fixups, STI);
210 Fixups.push_back(MCFixup::create(0, MO.getExpr(),
219 const MCOperand &MO = MI.getOperand(OpNo);
220 if (MO.isReg() || MO.isImm())
221 return getMachineOpValue(MI, MO, Fixups, STI);
223 Fixups.push_back(MCFixup::create(0, MO.getExpr(),
232 const MCOperand &MO = MI.getOperand(OpNo);
233 if (MO.isReg() || MO.isImm())
234 return getMachineOpValue(MI, MO, Fixups, STI);
237 MCFixup::create(0, MO.getExpr(), (MCFixupKind)Sparc::fixup_sparc_br16));