Lines Matching defs:MIB
300 MachineInstrBuilder MIB;
303 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantNull)
307 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantF)
312 MIB);
316 *MIB, *ST.getInstrInfo(), *ST.getRegisterInfo(), *ST.getRegBankInfo());
317 return MIB;
340 MachineInstrBuilder MIB;
342 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantI)
345 addNumImm(APInt(BitWidth, Val), MIB);
347 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantNull)
353 *MIB, *ST.getInstrInfo(), *ST.getRegisterInfo(), *ST.getRegBankInfo());
354 return MIB;
384 MachineInstrBuilder MIB;
386 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantI)
389 addNumImm(APInt(BitWidth, Val), MIB);
391 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantNull)
396 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(),
399 return MIB;
425 MachineInstrBuilder MIB;
426 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantF)
429 addNumImm(ConstFP->getValueAPF().bitcastToAPInt(), MIB);
430 return MIB;
482 MachineInstrBuilder MIB;
484 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantComposite)
488 MIB.addUse(SpvScalConst);
490 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantNull)
495 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(),
498 return MIB;
590 auto MIB = MIRBuilder.buildInstr(SPIRV::OpConstantComposite)
594 MIB.addUse(SpvScalConst);
595 return MIB;
705 auto MIB = MIRBuilder.buildInstr(SPIRV::OpVariable)
711 MIB.addUse(Init->getOperand(0).getReg());
718 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(),
722 Reg = MIB->getOperand(0).getReg();
874 auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeOpaque).addDef(ResVReg);
875 addStringImm(Name, MIB);
877 return MIB;
893 auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeStruct).addDef(ResVReg);
895 MIB.addUse(Ty);
900 return MIB;
937 auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeFunction)
941 MIB.addUse(getSPIRVTypeID(ArgType));
942 return MIB;
1314 auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeImage)
1325 MIB.addImm(AccessQual);
1326 return MIB;
1490 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRVOPcode))
1494 DT.add(LLVMTy, CurMF, getSPIRVTypeID(MIB));
1495 return finishCreatingSPIRVType(LLVMTy, MIB);
1544 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeBool))
1546 DT.add(LLVMTy, CurMF, getSPIRVTypeID(MIB));
1547 return finishCreatingSPIRVType(LLVMTy, MIB);
1567 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeVector))
1571 DT.add(LLVMTy, CurMF, getSPIRVTypeID(MIB));
1572 return finishCreatingSPIRVType(LLVMTy, MIB);
1586 auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpTypeArray))
1590 DT.add(LLVMTy, CurMF, getSPIRVTypeID(MIB));
1591 return finishCreatingSPIRVType(LLVMTy, MIB);
1607 auto MIB = BuildMI(MIRBuilder.getMBB(), MIRBuilder.getInsertPt(),
1613 DT.add(PointerElementType, AddressSpace, CurMF, getSPIRVTypeID(MIB));
1614 finishCreatingSPIRVType(LLVMTy, MIB);
1615 return MIB;
1643 MachineInstrBuilder MIB;
1644 MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpUndef))
1648 constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(),