Lines Matching defs:MIRBuilder
434 buildBoolRegister(MachineIRBuilder &MIRBuilder, const SPIRVType *ResultType,
437 SPIRVType *BoolType = GR->getOrCreateSPIRVBoolType(MIRBuilder);
442 GR->getOrCreateSPIRVVectorType(BoolType, VectorElements, MIRBuilder);
451 MIRBuilder.getMRI()->createGenericVirtualRegister(Type);
452 MIRBuilder.getMRI()->setRegClass(ResultRegister, GR->getRegClass(ResultType));
453 GR->assignSPIRVTypeToVReg(BoolType, ResultRegister, MIRBuilder.getMF());
459 static bool buildSelectInst(MachineIRBuilder &MIRBuilder,
468 TrueConst = GR->getOrCreateConsIntVector(AllOnes, MIRBuilder, ReturnType);
469 FalseConst = GR->getOrCreateConsIntVector(0, MIRBuilder, ReturnType);
471 TrueConst = GR->buildConstantInt(1, MIRBuilder, ReturnType);
472 FalseConst = GR->buildConstantInt(0, MIRBuilder, ReturnType);
475 return MIRBuilder.buildSelect(ReturnRegister, SourceRegister, TrueConst,
482 MachineIRBuilder &MIRBuilder,
486 DestinationReg = createVirtualRegister(BaseType, GR, MIRBuilder);
490 MIRBuilder.buildLoad(DestinationReg, PtrRegister, PtrInfo, Align());
497 MachineIRBuilder &MIRBuilder, SPIRVType *VariableType,
501 MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::pIDRegClass);
502 MIRBuilder.getMRI()->setType(
507 VariableType, MIRBuilder, SPIRV::StorageClass::Input);
508 GR->assignSPIRVTypeToVReg(PtrType, NewRegister, MIRBuilder.getMF());
514 /* HasLinkageTy */ hasLinkageTy, SPIRV::LinkageType::Import, MIRBuilder,
519 buildLoadInst(VariableType, Variable, MIRBuilder, GR, LLType, Reg);
520 MIRBuilder.getMRI()->setType(LoadedRegister, LLType);
570 MachineIRBuilder &MIRBuilder,
572 return GR->buildConstantInt(Val, MIRBuilder,
573 GR->getOrCreateSPIRVIntegerType(32, MIRBuilder));
578 MachineIRBuilder &MIRBuilder,
591 return buildConstantIntReg32(Scope, MIRBuilder, GR);
605 MachineIRBuilder &MIRBuilder,
608 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
619 return buildConstantIntReg32(Semantics, MIRBuilder, GR);
622 static bool buildOpFromWrapper(MachineIRBuilder &MIRBuilder, unsigned Opcode,
626 auto MIB = MIRBuilder.buildInstr(Opcode);
639 MachineIRBuilder &MIRBuilder) {
641 return buildOpFromWrapper(MIRBuilder, SPIRV::OpStore, Call, Register(0));
645 MIRBuilder.buildInstr(SPIRV::OpStore)
653 MachineIRBuilder &MIRBuilder,
657 return buildOpFromWrapper(MIRBuilder, SPIRV::OpAtomicLoad, Call, TypeReg);
666 : buildConstantIntReg32(SPIRV::Scope::Device, MIRBuilder, GR);
675 MemSemanticsReg = buildConstantIntReg32(Semantics, MIRBuilder, GR);
678 MIRBuilder.buildInstr(SPIRV::OpAtomicLoad)
689 MachineIRBuilder &MIRBuilder,
692 return buildOpFromWrapper(MIRBuilder, SPIRV::OpAtomicStore, Call, Register(0));
695 buildConstantIntReg32(SPIRV::Scope::Device, MIRBuilder, GR);
700 Register MemSemanticsReg = buildConstantIntReg32(Semantics, MIRBuilder, GR);
701 MIRBuilder.buildInstr(SPIRV::OpAtomicStore)
712 unsigned Opcode, MachineIRBuilder &MIRBuilder, SPIRVGlobalRegistry *GR) {
714 return buildOpFromWrapper(MIRBuilder, Opcode, Call,
718 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
765 MemSemEqualReg = buildConstantIntReg32(MemSemEqual, MIRBuilder, GR);
767 MemSemUnequalReg = buildConstantIntReg32(MemSemUnequal, MIRBuilder, GR);
781 ScopeReg = buildConstantIntReg32(Scope, MIRBuilder, GR);
785 : buildLoadInst(SpvDesiredTy, ExpectedArg, MIRBuilder,
792 GR->assignSPIRVTypeToVReg(SpvDesiredTy, Tmp, MIRBuilder.getMF());
794 SPIRVType *IntTy = GR->getOrCreateSPIRVIntegerType(32, MIRBuilder);
795 MIRBuilder.buildInstr(Opcode)
805 MIRBuilder.buildInstr(SPIRV::OpStore).addUse(ExpectedArg).addUse(Tmp);
806 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, Call->ReturnRegister, Tmp, Expected);
813 MachineIRBuilder &MIRBuilder,
816 return buildOpFromWrapper(MIRBuilder, Opcode, Call,
819 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
826 MIRBuilder, GR, MRI);
833 Semantics, MIRBuilder, GR);
848 MIRBuilder.getMF());
849 MIRBuilder.buildInstr(TargetOpcode::G_FNEG)
852 insertAssignInstr(NegValueReg, nullptr, Call->ReturnType, GR, MIRBuilder,
853 MIRBuilder.getMF().getRegInfo());
857 MIRBuilder.buildInstr(Opcode)
870 MachineIRBuilder &MIRBuilder,
878 MIRBuilder.buildInstr(Opcode)
891 unsigned Opcode, MachineIRBuilder &MIRBuilder,
896 return buildOpFromWrapper(MIRBuilder, Opcode, Call,
899 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
905 Semantics, MIRBuilder, GR);
915 buildScopeReg(ScopeRegister, SPIRV::Scope::Device, MIRBuilder, GR, MRI);
917 auto MIB = MIRBuilder.buildInstr(Opcode);
928 MachineIRBuilder &MIRBuilder,
932 static_cast<const SPIRVSubtarget *>(&MIRBuilder.getMF().getSubtarget());
943 return buildOpFromWrapper(MIRBuilder, Opcode, Call, Register(0));
945 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
972 : buildConstantIntReg32(MemSemantics, MIRBuilder, GR);
994 ScopeReg = buildConstantIntReg32(Scope, MIRBuilder, GR);
996 auto MIB = MIRBuilder.buildInstr(Opcode).addUse(ScopeReg);
998 MIB.addUse(buildConstantIntReg32(MemScope, MIRBuilder, GR));
1033 MachineIRBuilder &MIRBuilder,
1042 MIRBuilder.buildInstr(SPIRV::OpExtInst)
1054 MachineIRBuilder &MIRBuilder,
1064 buildBoolRegister(MIRBuilder, Call->ReturnType, GR);
1067 auto MIB = MIRBuilder.buildInstr(Opcode)
1075 return buildSelectInst(MIRBuilder, Call->ReturnRegister, CompareRegister,
1080 MachineIRBuilder &MIRBuilder,
1086 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
1089 return buildOpFromWrapper(MIRBuilder, GroupBuiltin->Opcode, Call,
1100 auto MIB = MIRBuilder.buildInstr(GroupBuiltin->Opcode)
1112 SPIRVType *BoolType = GR->getOrCreateSPIRVBoolType(MIRBuilder);
1120 Arg0 = GR->buildConstantInt(getIConstVal(BoolReg, MRI), MIRBuilder,
1126 GR->assignSPIRVTypeToVReg(BoolType, Arg0, MIRBuilder.getMF());
1127 MIRBuilder.buildICmp(CmpInst::ICMP_NE, Arg0, BoolReg,
1128 GR->buildConstantInt(0, MIRBuilder, BoolRegType));
1129 insertAssignInstr(Arg0, nullptr, BoolType, GR, MIRBuilder,
1130 MIRBuilder.getMF().getRegInfo());
1150 buildBoolRegister(MIRBuilder, Call->ReturnType, GR);
1154 Register ScopeRegister = buildConstantIntReg32(Scope, MIRBuilder, GR);
1173 GR->getOrCreateSPIRVVectorType(ElemType, VecLen, MIRBuilder);
1174 GR->assignSPIRVTypeToVReg(VecType, VecReg, MIRBuilder.getMF());
1176 MIRBuilder.buildInstr(TargetOpcode::G_BUILD_VECTOR).addDef(VecReg);
1181 insertAssignInstr(VecReg, nullptr, VecType, GR, MIRBuilder,
1182 MIRBuilder.getMF().getRegInfo());
1186 auto MIB = MIRBuilder.buildInstr(GroupBuiltin->Opcode)
1205 buildSelectInst(MIRBuilder, Call->ReturnRegister, GroupResultRegister,
1211 MachineIRBuilder &MIRBuilder,
1214 MachineFunction &MF = MIRBuilder.getMF();
1238 return buildOpFromWrapper(MIRBuilder, OpCode, Call,
1275 ? MIRBuilder.buildInstr(OpCode)
1276 : MIRBuilder.buildInstr(OpCode)
1285 MachineIRBuilder &MIRBuilder,
1288 MachineFunction &MF = MIRBuilder.getMF();
1299 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
1318 auto MIB = MIRBuilder.buildInstr(GroupUniform->Opcode)
1329 MachineIRBuilder &MIRBuilder,
1332 MachineFunction &MF = MIRBuilder.getMF();
1349 Register ScopeReg = buildConstantIntReg32(ScopeArg, MIRBuilder, GR);
1351 MIRBuilder.buildInstr(SPIRV::OpReadClockKHR)
1386 MachineIRBuilder &MIRBuilder,
1394 GR->getOrCreateSPIRVIntegerType(PointerSize, MIRBuilder);
1395 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
1413 MIRBuilder.getMF());
1417 GR->buildConstantInt(DefaultValue, MIRBuilder, PointerSizeType);
1418 MIRBuilder.buildCopy(DefaultReg, NewRegister);
1421 GR->getOrCreateSPIRVVectorType(PointerSizeType, 3, MIRBuilder);
1423 buildBuiltinVariableLoad(MIRBuilder, Vec3Ty, GR, BuiltinValue,
1430 GR->assignSPIRVTypeToVReg(PointerSizeType, Extracted, MIRBuilder.getMF());
1434 MachineInstrBuilder ExtractInst = MIRBuilder.buildIntrinsic(
1440 insertAssignInstr(Extracted, nullptr, PointerSizeType, GR, MIRBuilder,
1444 auto BoolType = GR->getOrCreateSPIRVBoolType(MIRBuilder);
1449 GR->assignSPIRVTypeToVReg(BoolType, CompareRegister, MIRBuilder.getMF());
1452 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CompareRegister, IndexRegister,
1453 GR->buildConstantInt(3, MIRBuilder, IndexType));
1458 GR->buildConstantInt(DefaultValue, MIRBuilder, PointerSizeType);
1467 MIRBuilder.getMF());
1470 MIRBuilder.buildSelect(SelectionResult, CompareRegister, Extracted,
1479 MIRBuilder.buildZExtOrTrunc(Call->ReturnRegister, ToTruncate);
1484 MachineIRBuilder &MIRBuilder,
1492 return genWorkgroupQuery(Call, MIRBuilder, GR, Value, 0);
1503 return buildBuiltinVariableLoad(MIRBuilder, Call->ReturnType, GR, Value,
1508 MachineIRBuilder &MIRBuilder,
1517 return buildAtomicInitInst(Call, MIRBuilder);
1519 return buildAtomicLoadInst(Call, MIRBuilder, GR);
1521 return buildAtomicStoreInst(Call, MIRBuilder, GR);
1524 return buildAtomicCompareExchangeInst(Call, Builtin, Opcode, MIRBuilder,
1532 return buildAtomicRMWInst(Call, Opcode, MIRBuilder, GR);
1534 return buildBarrierInst(Call, SPIRV::OpMemoryBarrier, MIRBuilder, GR);
1537 return buildAtomicFlagInst(Call, Opcode, MIRBuilder, GR);
1540 return buildOpFromWrapper(MIRBuilder, Opcode, Call,
1547 MachineIRBuilder &MIRBuilder,
1557 return buildAtomicFloatingRMWInst(Call, Opcode, MIRBuilder, GR);
1564 MachineIRBuilder &MIRBuilder,
1571 return buildBarrierInst(Call, Opcode, MIRBuilder, GR);
1575 MachineIRBuilder &MIRBuilder) {
1576 MIRBuilder.buildInstr(TargetOpcode::G_ADDRSPACE_CAST)
1583 MachineIRBuilder &MIRBuilder,
1586 return buildOpFromWrapper(MIRBuilder, SPIRV::OpDot, Call,
1591 MIRBuilder.buildInstr(IsVec ? SPIRV::OpDot : SPIRV::OpFMulS)
1600 MachineIRBuilder &MIRBuilder,
1611 MIRBuilder, Call->ReturnType, GR, Value, LLType, Call->ReturnRegister,
1622 MachineIRBuilder &MIRBuilder,
1651 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
1660 GR->assignSPIRVTypeToVReg(RetType, ResReg, MIRBuilder.getMF());
1661 MIRBuilder.buildInstr(Opcode)
1666 MIRBuilder.buildInstr(SPIRV::OpStore).addUse(SRetReg).addUse(ResReg);
1671 MachineIRBuilder &MIRBuilder,
1679 return genWorkgroupQuery(Call, MIRBuilder, GR, Value, IsDefault ? 1 : 0);
1683 MachineIRBuilder &MIRBuilder,
1702 QueryResult = MIRBuilder.getMRI()->createGenericVirtualRegister(
1704 MIRBuilder.getMRI()->setRegClass(QueryResult, &SPIRV::vIDRegClass);
1705 SPIRVType *IntTy = GR->getOrCreateSPIRVIntegerType(32, MIRBuilder);
1707 IntTy, NumActualRetComponents, MIRBuilder);
1708 GR->assignSPIRVTypeToVReg(QueryResultType, QueryResult, MIRBuilder.getMF());
1713 auto MIB = MIRBuilder.buildInstr(Opcode)
1718 MIB.addUse(buildConstantIntReg32(0, MIRBuilder, GR)); // Lod id.
1735 MIRBuilder.buildInstr(SPIRV::OpCompositeExtract)
1741 insertAssignInstr(Call->ReturnRegister, nullptr, NewType, GR, MIRBuilder,
1742 MIRBuilder.getMF().getRegInfo());
1745 auto MIB = MIRBuilder.buildInstr(SPIRV::OpVectorShuffle)
1757 MachineIRBuilder &MIRBuilder,
1786 MIRBuilder.buildInstr(Opcode)
1827 MachineIRBuilder &MIRBuilder,
1830 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
1842 getSamplerFilterModeFromBitmask(SamplerMask), MIRBuilder,
1847 GR->getOrCreateOpTypeSampledImage(ImageType, MIRBuilder);
1850 MIRBuilder.buildInstr(SPIRV::OpSampledImage)
1857 MIRBuilder);
1861 GR->getOrCreateSPIRVVectorType(Call->ReturnType, 4, MIRBuilder);
1865 GR->assignSPIRVTypeToVReg(TempType, TempRegister, MIRBuilder.getMF());
1866 MIRBuilder.buildInstr(SPIRV::OpImageSampleExplicitLod)
1873 MIRBuilder.buildInstr(SPIRV::OpCompositeExtract)
1879 MIRBuilder.buildInstr(SPIRV::OpImageSampleExplicitLod)
1888 MIRBuilder.buildInstr(SPIRV::OpImageRead)
1896 MIRBuilder.buildInstr(SPIRV::OpImageRead)
1906 MachineIRBuilder &MIRBuilder,
1908 MIRBuilder.buildInstr(SPIRV::OpImageWrite)
1917 MachineIRBuilder &MIRBuilder,
1919 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
1927 getSamplerFilterModeFromBitmask(Bitmask), MIRBuilder, Call->ReturnType);
1934 GR->getOrCreateOpTypeSampledImage(ImageType, MIRBuilder);
1939 MIRBuilder.buildInstr(SPIRV::OpSampledImage)
1956 : GR->getOrCreateSPIRVTypeByName(ReturnType, MIRBuilder);
1962 MIRBuilder.buildInstr(SPIRV::OpImageSampleExplicitLod)
1975 MachineIRBuilder &MIRBuilder) {
1976 MIRBuilder.buildSelect(Call->ReturnRegister, Call->Arguments[0],
1982 MachineIRBuilder &MIRBuilder,
1984 return buildOpFromWrapper(MIRBuilder, SPIRV::OpCompositeConstruct, Call,
1989 MachineIRBuilder &MIRBuilder,
2020 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
2023 auto MIB = MIRBuilder.buildInstr(SPIRV::OpCooperativeMatrixPrefetchINTEL)
2044 MIRBuilder.buildInstr(Opcode)
2050 return buildOpFromWrapper(MIRBuilder, Opcode, Call,
2055 MachineIRBuilder &MIRBuilder,
2061 const MachineRegisterInfo *MRI = MIRBuilder.getMRI();
2068 buildOpDecorate(Call->ReturnRegister, MIRBuilder, SPIRV::Decoration::SpecId,
2085 auto MIB = MIRBuilder.buildInstr(Opcode)
2098 auto MIB = MIRBuilder.buildInstr(Opcode)
2111 MachineIRBuilder &MIRBuilder,
2113 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
2119 MachineFunction &MF = MIRBuilder.getMF();
2143 SPIRVType *SpvFieldTy = GR->getOrCreateSPIRVType(FieldTy, MIRBuilder);
2146 MIRBuilder.buildInstr(SPIRV::OpLoad)
2151 cast<SPIRVSubtarget>(MIRBuilder.getMF().getSubtarget());
2152 Const = GR->getOrCreateConstIntArray(0, Size, *MIRBuilder.getInsertPt(),
2155 Const = GR->buildConstantInt(0, MIRBuilder, SpvTy);
2163 MIRBuilder.buildInstr(SPIRV::OpBuildNDRange)
2169 return MIRBuilder.buildInstr(SPIRV::OpStore)
2176 getOrCreateSPIRVDeviceEventPointer(MachineIRBuilder &MIRBuilder,
2178 LLVMContext &Context = MIRBuilder.getMF().getFunction().getContext();
2181 return GR->getOrCreateSPIRVType(PtrType, MIRBuilder);
2185 MachineIRBuilder &MIRBuilder,
2187 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
2188 const DataLayout &DL = MIRBuilder.getDataLayout();
2191 const SPIRVType *Int32Ty = GR->getOrCreateSPIRVIntegerType(32, MIRBuilder);
2212 Int32Ty, MIRBuilder, SPIRV::StorageClass::Function);
2216 GR->assignSPIRVTypeToVReg(PointerSizeTy, Reg, MIRBuilder.getMF());
2217 auto GEPInst = MIRBuilder.buildIntrinsic(
2222 .addUse(buildConstantIntReg32(0, MIRBuilder, GR)) // Indices.
2223 .addUse(buildConstantIntReg32(I, MIRBuilder, GR));
2229 auto MIB = MIRBuilder.buildInstr(SPIRV::OpEnqueueKernel)
2240 MIB.addUse(buildConstantIntReg32(0, MIRBuilder, GR)); // Dummy num events.
2242 MIRBuilder, getOrCreateSPIRVDeviceEventPointer(MIRBuilder, GR));
2259 MIB.addUse(buildConstantIntReg32(DL.getTypeStoreSize(PType), MIRBuilder, GR));
2262 MIRBuilder, GR));
2270 MachineIRBuilder &MIRBuilder,
2280 return MIRBuilder.buildInstr(Opcode).addUse(Call->Arguments[0]);
2283 return MIRBuilder.buildInstr(Opcode)
2287 return MIRBuilder.buildInstr(Opcode)
2292 return MIRBuilder.buildInstr(Opcode)
2296 return MIRBuilder.buildInstr(Opcode)
2301 return buildNDRange(Call, MIRBuilder, GR);
2303 return buildEnqueueKernel(Call, MIRBuilder, GR);
2310 MachineIRBuilder &MIRBuilder,
2320 return buildOpFromWrapper(MIRBuilder, Opcode, Call,
2323 auto Scope = buildConstantIntReg32(SPIRV::Scope::Workgroup, MIRBuilder, GR);
2330 : GR->getOrCreateSPIRVTypeByName("spirv.Event", MIRBuilder);
2334 bool Res = MIRBuilder.buildInstr(Opcode)
2343 : buildConstantIntReg32(1, MIRBuilder, GR))
2346 insertAssignInstr(Call->ReturnRegister, nullptr, NewType, GR, MIRBuilder,
2347 MIRBuilder.getMF().getRegInfo());
2351 return MIRBuilder.buildInstr(Opcode)
2362 MachineIRBuilder &MIRBuilder,
2372 return buildOpFromWrapper(MIRBuilder, Opcode, Call,
2377 buildOpDecorate(Call->ReturnRegister, MIRBuilder,
2380 buildOpDecorate(Call->ReturnRegister, MIRBuilder,
2402 &MIRBuilder.getMF().getSubtarget());
2423 &MIRBuilder.getMF().getSubtarget());
2458 MIRBuilder.buildInstr(Opcode)
2466 MachineIRBuilder &MIRBuilder,
2474 MIRBuilder.buildInstr(SPIRV::OpExtInst)
2492 MachineIRBuilder &MIRBuilder,
2500 auto MIB = MIRBuilder.buildInstr(Opcode);
2507 MachineRegisterInfo *MRI = MIRBuilder.getMRI();
2596 MachineIRBuilder &MIRBuilder,
2622 return generateExtInst(Call.get(), MIRBuilder, GR);
2624 return generateRelationalInst(Call.get(), MIRBuilder, GR);
2626 return generateGroupInst(Call.get(), MIRBuilder, GR);
2628 return generateBuiltinVar(Call.get(), MIRBuilder, GR);
2630 return generateAtomicInst(Call.get(), MIRBuilder, GR);
2632 return generateAtomicFloatingInst(Call.get(), MIRBuilder, GR);
2634 return generateBarrierInst(Call.get(), MIRBuilder, GR);
2636 return generateCastToPtrInst(Call.get(), MIRBuilder);
2638 return generateDotOrFMulInst(Call.get(), MIRBuilder, GR);
2640 return generateWaveInst(Call.get(), MIRBuilder, GR);
2642 return generateICarryBorrowInst(Call.get(), MIRBuilder, GR);
2644 return generateGetQueryInst(Call.get(), MIRBuilder, GR);
2646 return generateImageSizeQueryInst(Call.get(), MIRBuilder, GR);
2648 return generateImageMiscQueryInst(Call.get(), MIRBuilder, GR);
2650 return generateReadImageInst(DemangledCall, Call.get(), MIRBuilder, GR);
2652 return generateWriteImageInst(Call.get(), MIRBuilder, GR);
2654 return generateSampleImageInst(DemangledCall, Call.get(), MIRBuilder, GR);
2656 return generateSelectInst(Call.get(), MIRBuilder);
2658 return generateConstructInst(Call.get(), MIRBuilder, GR);
2660 return generateSpecConstantInst(Call.get(), MIRBuilder, GR);
2662 return generateEnqueueInst(Call.get(), MIRBuilder, GR);
2664 return generateAsyncCopy(Call.get(), MIRBuilder, GR);
2666 return generateConvertInst(DemangledCall, Call.get(), MIRBuilder, GR);
2668 return generateVectorLoadStoreInst(Call.get(), MIRBuilder, GR);
2670 return generateLoadStoreInst(Call.get(), MIRBuilder, GR);
2672 return generateIntelSubgroupsInst(Call.get(), MIRBuilder, GR);
2674 return generateGroupUniformInst(Call.get(), MIRBuilder, GR);
2676 return generateKernelClockInst(Call.get(), MIRBuilder, GR);
2678 return generateCoopMatrInst(Call.get(), MIRBuilder, GR);
2791 MachineIRBuilder &MIRBuilder,
2795 return GR->getOrCreateOpTypeByOpcode(ExtensionType, MIRBuilder, Opcode);
2798 static SPIRVType *getSamplerType(MachineIRBuilder &MIRBuilder,
2801 return GR->getOrCreateOpTypeSampler(MIRBuilder);
2805 MachineIRBuilder &MIRBuilder,
2810 return GR->getOrCreateOpTypePipe(MIRBuilder,
2816 MachineIRBuilder &MIRBuilder,
2823 GR->getOrCreateSPIRVType(ExtensionType->getTypeParameter(0), MIRBuilder);
2826 MIRBuilder, ExtensionType, ElemType, ExtensionType->getIntParameter(0),
2834 MachineIRBuilder &MIRBuilder, SPIRVGlobalRegistry *GR) {
2838 GR->getOrCreateSPIRVType(ExtensionType->getTypeParameter(0), MIRBuilder);
2854 MIRBuilder, SampledType,
2863 MachineIRBuilder &MIRBuilder,
2866 OpaqueType, SPIRV::AccessQualifier::ReadOnly, MIRBuilder, GR);
2868 return GR->getOrCreateOpTypeSampledImage(OpaqueImageType, MIRBuilder);
2923 MachineIRBuilder &MIRBuilder,
2936 OpaqueType->getStructName().str(), MIRBuilder.getContext());
2938 unsigned NumStartingVRegs = MIRBuilder.getMRI()->getNumVirtRegs();
2955 TargetType = getImageType(BuiltinType, AccessQual, MIRBuilder, GR);
2958 TargetType = getPipeType(BuiltinType, MIRBuilder, GR);
2961 TargetType = GR->getOrCreateOpTypeDeviceEvent(MIRBuilder);
2964 TargetType = getSamplerType(MIRBuilder, GR);
2967 TargetType = getSampledImageType(BuiltinType, MIRBuilder, GR);
2970 TargetType = getCoopMatrType(BuiltinType, MIRBuilder, GR);
2974 getNonParameterizedType(BuiltinType, TypeRecord, MIRBuilder, GR);
2980 if (NumStartingVRegs < MIRBuilder.getMRI()->getNumVirtRegs())
2981 buildOpName(GR->getSPIRVTypeID(TargetType), Name, MIRBuilder);