Lines Matching defs:LMUL

29         "The LMUL to use for getRegisterBitWidth queries. Affects LMUL used "
319   unsigned LMUL =
326         ST->useRVVForFixedLengthVectors() ? LMUL * ST->getRealMinVLen() : 0);
331             ? LMUL * RISCV::RVVBitsPerBlock
739     // At low LMUL, most of the cost is producing the vrgather index register.
740     // At high LMUL, the cost of the vrgather itself will dominate.
768   RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT);
769   return (LMUL == RISCVII::VLMUL::LMUL_F8 || LMUL == RISCVII::VLMUL::LMUL_F4 ||
770           LMUL == RISCVII::VLMUL::LMUL_F2 || LMUL == RISCVII::VLMUL::LMUL_1);
844         // Factor * LMUL shuffle ops.
1703       // For LMUL <= 8, there is no splitting,
1705       // When LMUL > 8 and split = 1,
1707       // When LMUL > 8 and split > 1,
2530   // scalarize these types with LMUL >= maximum fixed-length LMUL.