Lines Matching defs:RISCVSubtarget

1 //===-- RISCVSubtarget.cpp - RISC-V Subtarget Information -----------------===//
13 #include "RISCVSubtarget.h"
74 void RISCVSubtarget::anchor() {}
76 RISCVSubtarget &
77 RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU,
100 RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU,
113 RISCVSubtarget::~RISCVSubtarget() = default;
115 const SelectionDAGTargetInfo *RISCVSubtarget::getSelectionDAGInfo() const {
119 const CallLowering *RISCVSubtarget::getCallLowering() const {
125 InstructionSelector *RISCVSubtarget::getInstructionSelector() const {
134 const LegalizerInfo *RISCVSubtarget::getLegalizerInfo() const {
140 const RISCVRegisterBankInfo *RISCVSubtarget::getRegBankInfo() const {
146 bool RISCVSubtarget::useConstantPoolForLargeInts() const {
150 unsigned RISCVSubtarget::getMaxBuildIntsCost() const {
161 unsigned RISCVSubtarget::getMaxRVVVectorSizeInBits() const {
174 unsigned RISCVSubtarget::getMinRVVVectorSizeInBits() const {
190 unsigned RISCVSubtarget::getMaxLMULForFixedLengthVectors() const {
199 bool RISCVSubtarget::useRVVForFixedLengthVectors() const {
204 bool RISCVSubtarget::enableSubRegLiveness() const { return true; }
206 bool RISCVSubtarget::enableMachinePipeliner() const {
212 bool RISCVSubtarget::useAA() const { return UseAA; }
214 unsigned RISCVSubtarget::getMinimumJumpTableEntries() const {
220 void RISCVSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
236 void RISCVSubtarget::overridePostRASchedPolicy(MachineSchedPolicy &Policy,
251 bool RISCVSubtarget::useCCMovInsn() const {