Lines Matching defs:LMUL

258       // LMUL = 1/2/4/8. We should be able to convert vmv1r.v to vmv.v.v
259 // for fractional LMUL operations. However, we could not use the vsetvli
261 // 2 x LMUL.
277 // We only permit the source of COPY has the same LMUL as the defined
279 // There are cases we need to keep the whole register copy if the LMUL
295 // only checking the LMUL is insufficient due to reduction result is
355 // DstEncoding and SrcEncoding should be >= LMUL value we try to use to
401 // aligned to larger LMUL, we can eliminate some copyings.
3243 #define CASE_RVV_OPCODE_UNMASK_LMUL(OP, LMUL) \
3244 RISCV::Pseudo##OP##_##LMUL
3246 #define CASE_RVV_OPCODE_MASK_LMUL(OP, LMUL) \
3247 RISCV::Pseudo##OP##_##LMUL##_MASK
3249 #define CASE_RVV_OPCODE_LMUL(OP, LMUL) \
3250 CASE_RVV_OPCODE_UNMASK_LMUL(OP, LMUL): \
3251 case CASE_RVV_OPCODE_MASK_LMUL(OP, LMUL)
3287 #define CASE_VMA_OPCODE_COMMON(OP, TYPE, LMUL) \
3288 RISCV::PseudoV##OP##_##TYPE##_##LMUL
3309 #define CASE_VFMA_OPCODE_COMMON(OP, TYPE, LMUL, SEW) \
3310 RISCV::PseudoV##OP##_##TYPE##_##LMUL##_##SEW
3500 #define CASE_VMA_CHANGE_OPCODE_COMMON(OLDOP, NEWOP, TYPE, LMUL) \
3501 case RISCV::PseudoV##OLDOP##_##TYPE##_##LMUL: \
3502 Opc = RISCV::PseudoV##NEWOP##_##TYPE##_##LMUL; \
3529 #define CASE_VFMA_CHANGE_OPCODE_COMMON(OLDOP, NEWOP, TYPE, LMUL, SEW) \
3530 case RISCV::PseudoV##OLDOP##_##TYPE##_##LMUL##_##SEW: \
3531 Opc = RISCV::PseudoV##NEWOP##_##TYPE##_##LMUL##_##SEW; \
3700 #define CASE_WIDEOP_OPCODE_COMMON(OP, LMUL) \
3701 RISCV::PseudoV##OP##_##LMUL##_TIED
3714 #define CASE_WIDEOP_CHANGE_OPCODE_COMMON(OP, LMUL) \
3715 case RISCV::PseudoV##OP##_##LMUL##_TIED: \
3716 NewOpc = RISCV::PseudoV##OP##_##LMUL; \
3731 #define CASE_FP_WIDEOP_OPCODE_COMMON(OP, LMUL, SEW) \
3732 RISCV::PseudoV##OP##_##LMUL##_##SEW##_TIED
3745 #define CASE_FP_WIDEOP_CHANGE_OPCODE_COMMON(OP, LMUL, SEW) \
3746 case RISCV::PseudoV##OP##_##LMUL##_##SEW##_TIED: \
3747 NewOpc = RISCV::PseudoV##OP##_##LMUL##_##SEW; \