Lines Matching defs:NF

285 void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, unsigned NF, bool IsMasked,
301       RISCV::getVLSEGPseudo(NF, IsMasked, IsStrided, /*FF*/ false, Log2SEW,
314 void RISCVDAGToDAGISel::selectVLSEGFF(SDNode *Node, unsigned NF,
332       RISCV::getVLSEGPseudo(NF, IsMasked, /*Strided*/ false, /*FF*/ true,
346 void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, unsigned NF, bool IsMasked,
382       NF, IsMasked, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL),
395 void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, unsigned NF, bool IsMasked,
411       NF, IsMasked, IsStrided, Log2SEW, static_cast<unsigned>(LMUL));
421 void RISCVDAGToDAGISel::selectVSXSEG(SDNode *Node, unsigned NF, bool IsMasked,
457       NF, IsMasked, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL),
800 #define INST_NF_CASE(NAME, NF)                                                 \
801   case Intrinsic::riscv_##NAME##NF:                                            \
802     return NF;
803 #define INST_NF_CASE_MASK(NAME, NF)                                            \
804   case Intrinsic::riscv_##NAME##NF##_mask:                                     \
805     return NF;
806 #define INST_NF_CASE_FF(NAME, NF)                                              \
807   case Intrinsic::riscv_##NAME##NF##ff:                                        \
808     return NF;
809 #define INST_NF_CASE_FF_MASK(NAME, NF)                                         \
810   case Intrinsic::riscv_##NAME##NF##ff_mask:                                   \
811     return NF;