Lines Matching defs:IntNo
477 unsigned IntNo = Node->getConstantOperandVal(0);
479 assert((IntNo == Intrinsic::riscv_vsetvli ||
480 IntNo == Intrinsic::riscv_vsetvlimax) &&
483 bool VLMax = IntNo == Intrinsic::riscv_vsetvlimax;
747 unsigned IntNo = Node->getConstantOperandVal(1);
749 assert((IntNo == Intrinsic::riscv_sf_vc_x_se ||
750 IntNo == Intrinsic::riscv_sf_vc_i_se) &&
766 Opcode = IntNo == Intrinsic::riscv_sf_vc_x_se ? RISCV::PseudoVC_X_SE_MF8
770 Opcode = IntNo == Intrinsic::riscv_sf_vc_x_se ? RISCV::PseudoVC_X_SE_MF4
774 Opcode = IntNo == Intrinsic::riscv_sf_vc_x_se ? RISCV::PseudoVC_X_SE_MF2
778 Opcode = IntNo == Intrinsic::riscv_sf_vc_x_se ? RISCV::PseudoVC_X_SE_M1
782 Opcode = IntNo == Intrinsic::riscv_sf_vc_x_se ? RISCV::PseudoVC_X_SE_M2
786 Opcode = IntNo == Intrinsic::riscv_sf_vc_x_se ? RISCV::PseudoVC_X_SE_M4
790 Opcode = IntNo == Intrinsic::riscv_sf_vc_x_se ? RISCV::PseudoVC_X_SE_M8
1632 unsigned IntNo = Node->getConstantOperandVal(0);
1633 switch (IntNo) {
1641 bool IsUnsigned = IntNo == Intrinsic::riscv_vmsgeu;
1736 bool IsUnsigned = IntNo == Intrinsic::riscv_vmsgeu_mask;
1871 unsigned IntNo = Node->getConstantOperandVal(1);
1872 switch (IntNo) {
1883 selectVLSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
1894 selectVLSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
1905 selectVLSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
1916 selectVLSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
1927 selectVLXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
1937 selectVLXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
1947 selectVLXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
1957 selectVLXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
1967 selectVLSEGFF(Node, getSegInstNF(IntNo), /*IsMasked*/ false);
1977 selectVLSEGFF(Node, getSegInstNF(IntNo), /*IsMasked*/ true);
1984 bool IsMasked = IntNo == Intrinsic::riscv_vloxei_mask ||
1985 IntNo == Intrinsic::riscv_vluxei_mask;
1986 bool IsOrdered = IntNo == Intrinsic::riscv_vloxei ||
1987 IntNo == Intrinsic::riscv_vloxei_mask;
2028 bool IsMasked = IntNo == Intrinsic::riscv_vle_mask ||
2029 IntNo == Intrinsic::riscv_vlse_mask;
2031 IntNo == Intrinsic::riscv_vlse || IntNo == Intrinsic::riscv_vlse_mask;
2042 bool HasPassthruOperand = IntNo != Intrinsic::riscv_vlm;
2072 bool IsMasked = IntNo == Intrinsic::riscv_vleff_mask;
2100 unsigned IntNo = Node->getConstantOperandVal(1);
2101 switch (IntNo) {
2109 selectVSSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
2120 selectVSSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
2131 selectVSSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
2142 selectVSSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
2153 selectVSXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
2163 selectVSXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ false,
2173 selectVSXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
2183 selectVSXSEG(Node, getSegInstNF(IntNo), /*IsMasked*/ true,
2190 bool IsMasked = IntNo == Intrinsic::riscv_vsoxei_mask ||
2191 IntNo == Intrinsic::riscv_vsuxei_mask;
2192 bool IsOrdered = IntNo == Intrinsic::riscv_vsoxei ||
2193 IntNo == Intrinsic::riscv_vsoxei_mask;
2234 bool IsMasked = IntNo == Intrinsic::riscv_vse_mask ||
2235 IntNo == Intrinsic::riscv_vsse_mask;
2237 IntNo == Intrinsic::riscv_vsse || IntNo == Intrinsic::riscv_vsse_mask;