Lines Matching defs:LdSt
2836 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,
2841 if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, Width, TRI))
2847 static bool isLdStSafeToCluster(const MachineInstr &LdSt,
2850 if (LdSt.hasOrderedMemoryRef() || LdSt.getNumExplicitOperands() != 3)
2853 if (LdSt.getOperand(2).isFI())
2856 assert(LdSt.getOperand(2).isReg() && "Expected a reg operand.");
2859 if (LdSt.modifiesRegister(LdSt.getOperand(2).getReg(), TRI))
5745 const MachineInstr &LdSt, const MachineOperand *&BaseReg, int64_t &Offset,
5747 if (!LdSt.mayLoadOrStore() || LdSt.getNumExplicitOperands() != 3)
5751 if (!LdSt.getOperand(1).isImm() ||
5752 (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()))
5754 if (!LdSt.getOperand(1).isImm() ||
5755 (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()))
5758 if (!LdSt.hasOneMemOperand())
5761 Width = (*LdSt.memoperands_begin())->getSize();
5762 Offset = LdSt.getOperand(1).getImm();
5763 BaseReg = &LdSt.getOperand(2);