Lines Matching defs:SDValue
704 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
825 bool hasAndNotCompare(SDValue) const override {
835 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps,
851 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
852 SDValue &Offset,
858 bool SelectAddressEVXRegReg(SDValue N, SDValue &Base, SDValue &Index,
865 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
874 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
877 bool SelectAddressRegImm34(SDValue N, SDValue &Disp, SDValue &Base,
882 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index,
887 bool SelectAddressPCRel(SDValue N, SDValue &Base) const;
893 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
898 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
901 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const;
902 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const;
904 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
906 SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
912 void computeKnownBitsForTargetNode(const SDValue Op,
994 void LowerAsmOperandForConstraint(SDValue Op, StringRef Constraint,
995 std::vector<SDValue> &Ops,
1012 SmallVectorImpl<SDValue> &Ops,
1039 bool isZExtFree(SDValue Val, EVT VT2) const override;
1053 SDValue C) const override;
1068 bool isAccessedAsGotIndirect(SDValue N) const;
1154 SDValue getPICJumpTableRelocBase(SDValue Table,
1163 PPC::AddrMode SelectOptimalAddrMode(const SDNode *Parent, SDValue N,
1164 SDValue &Disp, SDValue &Base,
1169 PPC::AddrMode SelectForceXFormMode(SDValue N, SDValue &Disp, SDValue &Base,
1173 SelectionDAG & DAG, const SDLoc &DL, SDValue Val, SDValue *Parts,
1200 SDValue Ptr;
1201 SDValue Chain;
1202 SDValue ResChain;
1226 bool canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI,
1230 void LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
1232 SDValue LowerFP_TO_INTDirectMove(SDValue Op, SelectionDAG &DAG,
1235 bool directMoveIsProfitable(const SDValue &Op) const;
1236 SDValue LowerINT_TO_FPDirectMove(SDValue Op, SelectionDAG &DAG,
1239 SDValue LowerINT_TO_FPVector(SDValue Op, SelectionDAG &DAG,
1242 SDValue LowerTRUNCATEVector(SDValue Op, SelectionDAG &DAG) const;
1244 SDValue getFramePointerFrameIndex(SelectionDAG & DAG) const;
1245 SDValue getReturnAddrFrameIndex(SelectionDAG & DAG) const;
1267 SDValue EmitTailCallLoadFPAndRetAddr(SelectionDAG &DAG, int SPDiff,
1268 SDValue Chain, SDValue &LROpOut,
1269 SDValue &FPOpOut,
1272 SDValue getTOCEntry(SelectionDAG &DAG, const SDLoc &dl, SDValue GA) const;
1274 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
1275 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
1276 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
1277 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
1278 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
1279 SDValue LowerGlobalTLSAddressAIX(SDValue Op, SelectionDAG &DAG) const;
1280 SDValue LowerGlobalTLSAddressLinux(SDValue Op, SelectionDAG &DAG) const;
1281 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
1282 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
1283 SDValue LowerUaddo(SDValue Op, SelectionDAG &DAG) const;
1284 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
1285 SDValue LowerSSUBO(SDValue Op, SelectionDAG &DAG) const;
1286 SDValue LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
1287 SDValue LowerADJUST_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
1288 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
1289 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
1290 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const;
1291 SDValue LowerVACOPY(SDValue Op, SelectionDAG &DAG) const;
1292 SDValue LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
1293 SDValue LowerGET_DYNAMIC_AREA_OFFSET(SDValue Op, SelectionDAG &DAG) const;
1294 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
1295 SDValue LowerEH_DWARF_CFA(SDValue Op, SelectionDAG &DAG) const;
1296 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
1297 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
1298 SDValue LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const;
1299 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
1300 SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
1302 SDValue LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
1303 SDValue LowerGET_ROUNDING(SDValue Op, SelectionDAG &DAG) const;
1304 SDValue LowerSET_ROUNDING(SDValue Op, SelectionDAG &DAG) const;
1305 SDValue LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const;
1306 SDValue LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const;
1307 SDValue LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const;
1308 SDValue LowerFunnelShift(SDValue Op, SelectionDAG &DAG) const;
1309 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
1310 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
1311 SDValue LowerVPERM(SDValue Op, SelectionDAG &DAG, ArrayRef<int> PermMask,
1312 EVT VT, SDValue V1, SDValue V2) const;
1313 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
1314 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
1315 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
1316 SDValue LowerBSWAP(SDValue Op, SelectionDAG &DAG) const;
1317 SDValue LowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const;
1318 SDValue LowerIS_FPCLASS(SDValue Op, SelectionDAG &DAG) const;
1319 SDValue lowerToLibCall(const char *LibCallName, SDValue Op,
1321 SDValue lowerLibCallBasedOnType(const char *LibCallFloatName,
1322 const char *LibCallDoubleName, SDValue Op,
1324 bool isLowringToMASSFiniteSafe(SDValue Op) const;
1325 bool isLowringToMASSSafe(SDValue Op) const;
1327 SDValue lowerLibCallBase(const char *LibCallDoubleName,
1330 const char *LibCallFloatNameFinite, SDValue Op,
1332 SDValue lowerPow(SDValue Op, SelectionDAG &DAG) const;
1333 SDValue lowerSin(SDValue Op, SelectionDAG &DAG) const;
1334 SDValue lowerCos(SDValue Op, SelectionDAG &DAG) const;
1335 SDValue lowerLog(SDValue Op, SelectionDAG &DAG) const;
1336 SDValue lowerLog10(SDValue Op, SelectionDAG &DAG) const;
1337 SDValue lowerExp(SDValue Op, SelectionDAG &DAG) const;
1338 SDValue LowerATOMIC_LOAD_STORE(SDValue Op, SelectionDAG &DAG) const;
1339 SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
1340 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
1341 SDValue LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const;
1342 SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
1343 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
1345 SDValue LowerVectorLoad(SDValue Op, SelectionDAG &DAG) const;
1346 SDValue LowerVectorStore(SDValue Op, SelectionDAG &DAG) const;
1348 SDValue LowerCallResult(SDValue Chain, SDValue InGlue,
1352 SmallVectorImpl<SDValue> &InVals) const;
1354 SDValue FinishCall(CallFlags CFlags, const SDLoc &dl, SelectionDAG &DAG,
1355 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
1356 SDValue InGlue, SDValue Chain, SDValue CallSeqStart,
1357 SDValue &Callee, int SPDiff, unsigned NumBytes,
1359 SmallVectorImpl<SDValue> &InVals,
1362 SDValue
1363 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1366 SmallVectorImpl<SDValue> &InVals) const override;
1368 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
1369 SmallVectorImpl<SDValue> &InVals) const override;
1376 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1378 const SmallVectorImpl<SDValue> &OutVals,
1381 SDValue extendArgForPPC64(ISD::ArgFlagsTy Flags, EVT ObjectVT,
1382 SelectionDAG &DAG, SDValue ArgVal,
1385 SDValue LowerFormalArguments_AIX(
1386 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1388 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const;
1389 SDValue LowerFormalArguments_64SVR4(
1390 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1392 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const;
1393 SDValue LowerFormalArguments_32SVR4(
1394 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
1396 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const;
1398 SDValue createMemcpyOutsideCallSeq(SDValue Arg, SDValue PtrOff,
1399 SDValue CallSeqStart,
1403 SDValue LowerCall_64SVR4(SDValue Chain, SDValue Callee, CallFlags CFlags,
1405 const SmallVectorImpl<SDValue> &OutVals,
1408 SmallVectorImpl<SDValue> &InVals,
1410 SDValue LowerCall_32SVR4(SDValue Chain, SDValue Callee, CallFlags CFlags,
1412 const SmallVectorImpl<SDValue> &OutVals,
1415 SmallVectorImpl<SDValue> &InVals,
1417 SDValue LowerCall_AIX(SDValue Chain, SDValue Callee, CallFlags CFlags,
1419 const SmallVectorImpl<SDValue> &OutVals,
1422 SmallVectorImpl<SDValue> &InVals,
1425 SDValue lowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
1426 SDValue lowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
1427 SDValue LowerBITCAST(SDValue Op, SelectionDAG &DAG) const;
1429 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const;
1430 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const;
1431 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const;
1432 SDValue combineStoreFPToInt(SDNode *N, DAGCombinerInfo &DCI) const;
1433 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const;
1434 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const;
1435 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const;
1436 SDValue combineSRL(SDNode *N, DAGCombinerInfo &DCI) const;
1437 SDValue combineMUL(SDNode *N, DAGCombinerInfo &DCI) const;
1438 SDValue combineADD(SDNode *N, DAGCombinerInfo &DCI) const;
1439 SDValue combineFMALike(SDNode *N, DAGCombinerInfo &DCI) const;
1440 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const;
1441 SDValue combineSetCC(SDNode *N, DAGCombinerInfo &DCI) const;
1442 SDValue combineVectorShuffle(ShuffleVectorSDNode *SVN,
1444 SDValue combineVReverseMemOP(ShuffleVectorSDNode *SVN, LSBaseSDNode *LSBase,
1450 SDValue ConvertSETCCToSubtract(SDNode *N, DAGCombinerInfo &DCI) const;
1452 SDValue getSqrtEstimate(SDValue Operand, SelectionDAG &DAG, int Enabled,
1455 SDValue getRecipEstimate(SDValue Operand, SelectionDAG &DAG, int Enabled,
1457 SDValue getSqrtInputTest(SDValue Operand, SelectionDAG &DAG,
1459 SDValue getSqrtResultForDenormInput(SDValue Operand,
1463 SDValue
1467 /// lowerToVINSERTH - Return the SDValue if this VECTOR_SHUFFLE can be
1471 SDValue lowerToVINSERTH(ShuffleVectorSDNode *N, SelectionDAG &DAG) const;
1473 /// lowerToVINSERTB - Return the SDValue if this VECTOR_SHUFFLE can be
1476 SDValue lowerToVINSERTB(ShuffleVectorSDNode *N, SelectionDAG &DAG) const;
1478 /// lowerToXXSPLTI32DX - Return the SDValue if this VECTOR_SHUFFLE can be
1480 SDValue lowerToXXSPLTI32DX(ShuffleVectorSDNode *N, SelectionDAG &DAG) const;
1496 unsigned computeMOFlags(const SDNode *Parent, SDValue N,
1508 bool isIntS16Immediate(SDValue Op, int16_t &Imm);
1510 bool isIntS34Immediate(SDValue Op, int64_t &Imm);