Lines Matching defs:UnitSize

2014 static bool isVMerge(ShuffleVectorSDNode *N, unsigned UnitSize,
2018   assert((UnitSize == 1 || UnitSize == 2 || UnitSize == 4) &&
2021   for (unsigned i = 0; i != 8/UnitSize; ++i)     // Step over units
2022     for (unsigned j = 0; j != UnitSize; ++j) {   // Step over bytes within unit
2023       if (!isConstantOrUndef(N->getMaskElt(i*UnitSize*2+j),
2024                              LHSStart+j+i*UnitSize) ||
2025           !isConstantOrUndef(N->getMaskElt(i*UnitSize*2+UnitSize+j),
2026                              RHSStart+j+i*UnitSize))
2038 bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
2042       return isVMerge(N, UnitSize, 0, 0);
2044       return isVMerge(N, UnitSize, 0, 16);
2049       return isVMerge(N, UnitSize, 8, 8);
2051       return isVMerge(N, UnitSize, 8, 24);
2063 bool PPC::isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
2067       return isVMerge(N, UnitSize, 8, 8);
2069       return isVMerge(N, UnitSize, 8, 24);
2074       return isVMerge(N, UnitSize, 0, 0);
2076       return isVMerge(N, UnitSize, 0, 16);