Lines Matching defs:RLAmt
1546 unsigned RLAmt;
1560 : V(V), RLAmt(R), StartIdx(S), EndIdx(E), Repl32(false), Repl32CR(false),
1562 LLVM_DEBUG(dbgs() << "\tbit group for " << V.getNode() << " RLAmt = " << R
1567 // Information on each (Value, RLAmt) pair (like the number of groups
1571 unsigned RLAmt = std::numeric_limits<unsigned>::max();
1592 else if (RLAmt == 0 && Other.RLAmt != 0)
1594 else if (RLAmt != 0 && Other.RLAmt == 0)
1852 RLAmt.resize(Bits.size());
1857 RLAmt[i] = i - VBI;
1859 RLAmt[i] = Bits.size() - (VBI - i);
1862 RLAmt[i] = UINT32_MAX;
1874 unsigned LastRLAmt = RLAmt[0];
1879 unsigned ThisRLAmt = RLAmt[i];
1892 // Value or RLAmt does not match here. Instead, we terminate this group
1928 BitGroups[0].RLAmt == BitGroups[BitGroups.size()-1].RLAmt) {
1936 // Take all (SDValue, RLAmt) pairs and sort them by the number of groups
1938 // which does not require rotate, i.e. RLAmt is 0, to avoid the first rotate
1945 unsigned RLAmtKey = BG.RLAmt + (BG.Repl32 ? 64 : 0);
1948 VRI.RLAmt = BG.RLAmt;
1976 // Groups: | RLAmt = 8 | RLAmt = 40 |
1979 // bits into the high-order 32 bits, this can be one bit group with a RLAmt
2009 // If this bit group has RLAmt of 0 and will not be merged with
2012 if (BG.RLAmt == 0) {
2016 (BG2.RLAmt == 0 || BG2.RLAmt == 32))
2025 if (BG.RLAmt >= 32) {
2026 BG.RLAmt -= 32;
2033 << BG.V.getNode() << " RLAmt = " << BG.RLAmt << " ["
2045 if (I->Repl32 && IP->Repl32 && I->V == IP->V && I->RLAmt == IP->RLAmt &&
2049 << I->V.getNode() << " RLAmt = " << I->RLAmt << " ["
2072 (I->RLAmt % 32) == IP->RLAmt && (I->RLAmt % 32) == IN->RLAmt &&
2077 << " RLAmt = " << I->RLAmt << " [" << I->StartIdx
2089 IP->Repl32CR = IP->Repl32CR || I->RLAmt >= 32;
2097 IP->Repl32CR = IP->Repl32CR || IN->Repl32CR || I->RLAmt >= 32;
2170 if (RLAmt[i] != VRI.RLAmt)
2179 bool NeedsRotate = VRI.RLAmt != 0;
2202 << " RL: " << VRI.RLAmt << ":"
2214 if (VRI.RLAmt) {
2216 { TruncateToInt32(VRI.V, dl), getI32Imm(VRI.RLAmt, dl),
2253 return BG.V == VRI.V && BG.RLAmt == VRI.RLAmt;
2269 // to fill in, select the (Value, RLAmt) with the highest priority (largest
2273 if (VRI.RLAmt) {
2276 { TruncateToInt32(VRI.V, dl), getI32Imm(VRI.RLAmt, dl),
2286 return BG.V == VRI.V && BG.RLAmt == VRI.RLAmt;
2296 { TruncateToInt32(BG.V, dl), getI32Imm(BG.RLAmt, dl),
2302 { Res, TruncateToInt32(BG.V, dl), getI32Imm(BG.RLAmt, dl),
2343 unsigned SelectRotMask64Count(unsigned RLAmt, bool Repl32,
2355 InstMaskEnd == 63 - RLAmt)
2363 SDValue SelectRotMask64(SDValue V, const SDLoc &dl, unsigned RLAmt,
2380 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl),
2388 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl),
2395 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl),
2400 if (InstMaskEnd == 63 - RLAmt) {
2402 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl),
2418 // is RLAmt.
2419 unsigned RLAmt1 = (64 + RLAmt - RLAmt2) % 64;
2428 unsigned RLAmt, bool Repl32, unsigned MaskStart,
2444 { ExtendToInt64(Base, dl), ExtendToInt64(V, dl), getI32Imm(RLAmt, dl),
2450 if (InstMaskEnd == 63 - RLAmt) {
2452 { ExtendToInt64(Base, dl), ExtendToInt64(V, dl), getI32Imm(RLAmt, dl),
2468 // is RLAmt.
2469 unsigned RLAmt1 = (64 + RLAmt - RLAmt2) % 64;
2500 unsigned EffRLAmt = BG.RLAmt;
2513 return VRI.RLAmt == EffRLAmt;
2539 bool NeedsRotate = VRI.RLAmt || (VRI.Repl32 && !isUInt<32>(Mask));
2561 SelectRotMask64Count(BG.RLAmt, BG.Repl32, BG.StartIdx, BG.EndIdx,
2567 << " RL: " << VRI.RLAmt << (VRI.Repl32 ? " (32):" : ":")
2592 if (VRI.RLAmt || (VRI.Repl32 && !isUInt<32>(Mask)))
2593 VRot = SelectRotMask64(VRI.V, dl, VRI.RLAmt, VRI.Repl32,
2655 // to fill in, select the (Value, RLAmt) with the highest priority (largest
2673 if (VRI.RLAmt) {
2677 if (BG.V != VRI.V || BG.RLAmt != VRI.RLAmt ||
2692 Res = SelectRotMask64(VRI.V, dl, VRI.RLAmt, VRI.Repl32,
2701 return BG.V == VRI.V && BG.RLAmt == VRI.RLAmt &&
2710 if (SelectRotMask64Count(I->RLAmt, I->Repl32, I->StartIdx, I->EndIdx,
2712 SelectRotMask64Count(I->RLAmt, I->Repl32, I->StartIdx, I->EndIdx,
2727 Res = SelectRotMask64(BG.V, dl, BG.RLAmt, BG.Repl32, BG.StartIdx,
2730 Res = SelectRotMaskIns64(Res, BG.V, dl, BG.RLAmt, BG.Repl32,
2818 SmallVector<unsigned, 64> RLAmt;
2846 // Fill it RLAmt and set NeedMask.