Lines Matching defs:InstCnt
1020 uint64_t Imm, unsigned &InstCnt) {
1035 InstCnt = 1;
1049 InstCnt = 2;
1171 InstCnt = 3;
1184 InstCnt = 3;
1251 InstCnt = 0;
1258 // find one. The variable InstCnt is set to the number of instructions that
1261 uint64_t Imm, unsigned &InstCnt) {
1278 InstCnt = 1;
1287 InstCnt = 2;
1368 InstCnt = 3;
1381 unsigned *InstCnt = nullptr) {
1402 if (InstCnt)
1403 *InstCnt = InstCntDirectP;
1409 if (InstCnt)
1410 *InstCnt = InstCntDirect;
1460 if (InstCnt)
1461 *InstCnt = 4;
1480 if (InstCnt)
1481 *InstCnt = InstCntDirect;
2161 void SelectAndParts32(const SDLoc &dl, SDValue &Res, unsigned *InstCnt) {
2211 if (InstCnt) *InstCnt += NumAndInsts;
2259 SDNode *Select32(SDNode *N, bool LateMask, unsigned *InstCnt) {
2263 if (InstCnt) *InstCnt = 0;
2266 SelectAndParts32(dl, Res, InstCnt);
2274 if (InstCnt) *InstCnt += 1;
2290 if (InstCnt) *InstCnt += BitGroups.size();
2316 if (InstCnt) *InstCnt += (unsigned) (ANDIMask != 0) +
2365 unsigned *InstCnt = nullptr) {
2371 if (InstCnt) *InstCnt += 1;
2413 if (InstCnt) *InstCnt += 1;
2429 unsigned MaskEnd, unsigned *InstCnt = nullptr) {
2435 if (InstCnt) *InstCnt += 1;
2463 if (InstCnt) *InstCnt += 1;
2475 void SelectAndParts64(const SDLoc &dl, SDValue &Res, unsigned *InstCnt) {
2585 if (InstCnt) *InstCnt += NumAndInsts;
2645 SDNode *Select64(SDNode *N, bool LateMask, unsigned *InstCnt) {
2649 if (InstCnt) *InstCnt = 0;
2652 SelectAndParts64(dl, Res, InstCnt);
2694 InstCnt);
2728 BG.EndIdx, InstCnt);
2731 BG.StartIdx, BG.EndIdx, InstCnt);
2749 if (InstCnt) *InstCnt += (unsigned) (ANDIMask != 0) +
2780 if (InstCnt)
2781 *InstCnt += NumOfSelectInsts + /* and */ 1;
2788 SDNode *Select(SDNode *N, bool LateMask, unsigned *InstCnt = nullptr) {
2802 return Select32(N, LateMask, InstCnt);
2805 return Select64(N, LateMask, InstCnt);
2860 unsigned InstCnt = 0, InstCntLateMask = 0;
2862 SDNode *RN = Select(N, false, &InstCnt);
2863 LLVM_DEBUG(dbgs() << "\t\tisel would use " << InstCnt << " instructions\n");
2870 if (InstCnt <= InstCntLateMask) {