Lines Matching defs:R12

426     - If MBB is an entry or exit block, set SR1 and SR2 to R0 and R12
430     - If the defaults (R0/R12) are available, return true
449   Register R12 = Subtarget.isPPC64() ? PPC::X12 : PPC::R12;
457     *SR2 = R12;
460   // If MBB is an entry or exit block, use R0 and R12 as the scratch registers.
481   // Note that we only return here if both R0 and R12 are available because
484   if (!RS.isRegUsed(R0) && !RS.isRegUsed(R12))
658   Register TempReg     = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg
659   //  ...(R12/X12 is volatile in both Darwin & SVR4, & can't be a function arg.)
1578   Register TempReg     = isPPC64 ? PPC::X12 : PPC::R12; // another scratch reg
2476         CRMIB = BuildMI(*MF, DL, TII.get(PPC::MFCR), PPC::R12)
2481                                          .addReg(PPC::R12,
2540   unsigned MoveReg = PPC::R12;