Lines Matching defs:TmpReg

147       Register TmpReg = createResultReg(ToRC);
149               TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg, Flag, SubReg);
150       return TmpReg;
1017     Register TmpReg = createResultReg(&PPC::G8RCRegClass);
1018     if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned))
1020     SrcReg = TmpReg;
1112     Register TmpReg = createResultReg(&PPC::G8RCRegClass);
1113     if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned))
1116     SrcReg = TmpReg;
1437         Register TmpReg = createResultReg(RC);
1438         if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/false))
1441         Arg = TmpReg;
1449         Register TmpReg = createResultReg(RC);
1450         if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/true))
1453         Arg = TmpReg;
1763               Register TmpReg = createResultReg(RC);
1764               if (!PPCEmitIntExt(RVVT, SrcReg, DestVT, TmpReg, true))
1766               SrcReg = TmpReg;
1772               Register TmpReg = createResultReg(RC);
1773               if (!PPCEmitIntExt(RVVT, SrcReg, DestVT, TmpReg, false))
1775               SrcReg = TmpReg;
2013   Register TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass);
2019             TmpReg)
2022       .addImm(0).addReg(TmpReg).addMemOperand(MMO);
2026             TmpReg).addReg(PPC::X2).addConstantPoolIndex(Idx);
2032               TmpReg2).addConstantPoolIndex(Idx).addReg(TmpReg);
2039         .addReg(TmpReg)
2129     Register TmpReg = createResultReg(RC);
2131             TII.get(IsGPRC ? PPC::LIS : PPC::LIS8), TmpReg)
2135       .addReg(TmpReg).addImm(Lo);