Lines Matching defs:Dest0

52                        Register Dest0, Register Dest1, Register Src0,
56   if (Dest0 == Src1 && Dest1 == Src0) {
58     BuildMI(MBB, MBBI, DL, XOR, Dest0).addReg(Dest0).addReg(Dest1);
59     BuildMI(MBB, MBBI, DL, XOR, Dest1).addReg(Dest0).addReg(Dest1);
60     BuildMI(MBB, MBBI, DL, XOR, Dest0).addReg(Dest0).addReg(Dest1);
61   } else if (Dest0 != Src0 || Dest1 != Src1) {
62     if (Dest0 == Src1 || Dest1 != Src0) {
64       BuildMI(MBB, MBBI, DL, OR, Dest0).addReg(Src0).addReg(Src0);
66       BuildMI(MBB, MBBI, DL, OR, Dest0).addReg(Src0).addReg(Src0);