Lines Matching defs:MBB
80 void MipsSEInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
109 BuildMI(MBB, I, DL, get(Mips::RDDSP), DestReg).addImm(1 << 4)
130 BuildMI(MBB, I, DL, get(Mips::WRDSP))
135 BuildMI(MBB, I, DL, get(Mips::CTCMSA))
172 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
212 void MipsSEInstrInfo::storeRegToStack(MachineBasicBlock &MBB,
220 MachineMemOperand *MMO = GetMemOperand(MBB, FI, MachineMemOperand::MOStore);
266 const Function &Func = MBB.getParent()->getFunction();
269 BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0);
272 BuildMI(MBB, I, DL, get(Mips::MFHI64), Mips::K0_64);
275 BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0);
278 BuildMI(MBB, I, DL, get(Mips::MFLO64), Mips::K0_64);
284 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))
289 MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register DestReg,
293 if (I != MBB.end()) DL = I->getDebugLoc();
294 MachineMemOperand *MMO = GetMemOperand(MBB, FI, MachineMemOperand::MOLoad);
297 const Function &Func = MBB.getParent()->getFunction();
345 BuildMI(MBB, I, DL, get(Opc), DestReg)
365 BuildMI(MBB, I, DL, get(Opc), Reg)
369 BuildMI(MBB, I, DL, get(LdOp)).addReg(Reg);
374 MachineBasicBlock &MBB = *MI.getParent();
382 expandRetRA(MBB, MI);
385 expandERet(MBB, MI);
388 expandPseudoMFHiLo(MBB, MI, Mips::MFHI);
391 expandPseudoMFHiLo(MBB, MI, Mips::MFHI16_MM);
394 expandPseudoMFHiLo(MBB, MI, Mips::MFLO);
397 expandPseudoMFHiLo(MBB, MI, Mips::MFLO16_MM);
400 expandPseudoMFHiLo(MBB, MI, Mips::MFHI64);
403 expandPseudoMFHiLo(MBB, MI, Mips::MFLO64);
406 expandPseudoMTLoHi(MBB, MI, Mips::MTLO, Mips::MTHI, false);
409 expandPseudoMTLoHi(MBB, MI, Mips::MTLO64, Mips::MTHI64, false);
412 expandPseudoMTLoHi(MBB, MI, Mips::MTLO_DSP, Mips::MTHI_DSP, true);
415 expandPseudoMTLoHi(MBB, MI, Mips::MTLO_MM, Mips::MTHI_MM, false);
418 expandCvtFPInt(MBB, MI, Mips::CVT_S_W, Mips::MTC1, false);
422 expandCvtFPInt(MBB, MI, Opc, Mips::MTC1, false);
425 expandCvtFPInt(MBB, MI, Mips::CVT_S_L, Mips::DMTC1, true);
429 expandCvtFPInt(MBB, MI, Opc, Mips::MTC1, true);
432 expandCvtFPInt(MBB, MI, Mips::CVT_D64_L, Mips::DMTC1, true);
435 expandBuildPairF64(MBB, MI, isMicroMips, false);
438 expandBuildPairF64(MBB, MI, isMicroMips, true);
441 expandExtractElementF64(MBB, MI, isMicroMips, false);
444 expandExtractElementF64(MBB, MI, isMicroMips, true);
448 expandEhReturn(MBB, MI);
452 MBB.erase(MI);
560 MachineBasicBlock &MBB,
571 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);
580 unsigned Reg = loadImmediate(Amount, MBB, I, DL, nullptr);
581 BuildMI(MBB, I, DL, get(Opc), SP).addReg(SP).addReg(Reg, RegState::Kill);
587 unsigned MipsSEInstrInfo::loadImmediate(int64_t Imm, MachineBasicBlock &MBB,
593 MachineRegisterInfo &RegInfo = MBB.getParent()->getRegInfo();
613 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
615 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(ZEROReg)
620 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(Reg, RegState::Kill)
656 void MipsSEInstrInfo::expandRetRA(MachineBasicBlock &MBB,
661 MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
664 MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn))
674 void MipsSEInstrInfo::expandERet(MachineBasicBlock &MBB,
676 BuildMI(MBB, I, I->getDebugLoc(), get(Mips::ERET));
691 void MipsSEInstrInfo::expandPseudoMFHiLo(MachineBasicBlock &MBB,
694 BuildMI(MBB, I, I->getDebugLoc(), get(NewOpc), I->getOperand(0).getReg());
697 void MipsSEInstrInfo::expandPseudoMTLoHi(MachineBasicBlock &MBB,
710 MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc));
711 MachineInstrBuilder HiInst = BuildMI(MBB, I, DL, get(HiOpc));
727 void MipsSEInstrInfo::expandCvtFPInt(MachineBasicBlock &MBB,
739 compareOpndSize(CvtOpc, *MBB.getParent());
747 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);
748 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);
751 void MipsSEInstrInfo::expandExtractElementF64(MachineBasicBlock &MBB,
785 BuildMI(MBB, I, dl,
791 BuildMI(MBB, I, dl, get(Mips::MFC1), DstReg).addReg(SubReg);
794 void MipsSEInstrInfo::expandBuildPairF64(MachineBasicBlock &MBB,
826 BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_lo))
841 BuildMI(MBB, I, dl,
850 BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_hi))
854 void MipsSEInstrInfo::expandEhReturn(MachineBasicBlock &MBB,
871 const TargetMachine &TM = MBB.getParent()->getTarget();
873 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9)
876 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA)
879 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg);
880 expandRetRA(MBB, I);