Lines Matching defs:Br

129   MachineInstr *Br = nullptr;
156 int64_t computeOffset(const MachineInstr *Br);
158 void replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL,
230 /// Iterate over list of Br's operands and search for a MachineBasicBlock
232 static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) {
233 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
234 const MachineOperand &MO = Br.getOperand(I);
310 int64_t MipsBranchExpansion::computeOffset(const MachineInstr *Br) {
312 int ThisMBB = Br->getParent()->getNumber();
313 int TargetMBB = getTargetMBB(*Br)->getNumber();
338 // Replace Br with a branch which has the opposite condition code and a
340 void MipsBranchExpansion::replaceBranch(MachineBasicBlock &MBB, Iter Br,
343 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode());
346 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc);
348 for (unsigned I = 0, E = Br->getDesc().getNumOperands(); I < E; ++I) {
349 MachineOperand &MO = Br->getOperand(I);
358 if (!TII->isBranchWithImm(Br->getOpcode()))
370 if (Br->hasDelaySlot()) {
373 assert(Br->isBundledWithSucc());
374 MachineBasicBlock::instr_iterator II = Br.getInstrIterator();
377 Br->eraseFromParent();
416 MachineBasicBlock *MBB = I.Br->getParent(), *TgtMBB = getTargetMBB(*I.Br);
417 DebugLoc DL = I.Br->getDebugLoc();
724 if (I.Br->isUnconditionalBranch()) {
726 assert(I.Br->getDesc().getNumOperands() == 1);
727 I.Br->removeOperand(0);
728 I.Br->addOperand(MachineOperand::CreateMBB(LongBrMBB));
731 replaceBranch(*MBB, I.Br, DL, &*FallThroughMBB);
897 ReverseIter Br = getNonDebugInstr(MBB->rbegin(), End);
899 if ((Br != End) && Br->isBranch() && !Br->isIndirectBranch() &&
900 (Br->isConditionalBranch() ||
901 (Br->isUnconditionalBranch() && IsPIC))) {
902 int64_t Offset = computeOffset(&*Br);
913 !TII->isBranchOffsetInRange(Br->getOpcode(), Offset)) {
915 MBBInfos[I].Br = &*Br;
927 if (!I->Br)