Lines Matching defs:Reg0
176 void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc,
180 TmpInst.addOperand(MCOperand::createReg(Reg0));
185 void MipsTargetStreamer::emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1,
189 TmpInst.addOperand(MCOperand::createReg(Reg0));
195 void MipsTargetStreamer::emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm,
197 emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, STI);
200 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1,
202 emitRX(Opcode, Reg0, MCOperand::createReg(Reg1), IDLoc, STI);
215 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
220 TmpInst.addOperand(MCOperand::createReg(Reg0));
227 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1,
230 emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI);
233 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
238 TmpInst.addOperand(MCOperand::createReg(Reg0));
246 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1,
249 emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI);
252 void MipsTargetStreamer::emitRRIII(unsigned Opcode, unsigned Reg0,
258 TmpInst.addOperand(MCOperand::createReg(Reg0));