Lines Matching defs:Inst
50 uint64_t getBinaryCodeForInstr(const MCInst &Inst,
56 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
60 unsigned getRiMemoryOpValue(const MCInst &Inst, unsigned OpNo,
64 unsigned getRrMemoryOpValue(const MCInst &Inst, unsigned OpNo,
68 unsigned getSplsOpValue(const MCInst &Inst, unsigned OpNo,
72 unsigned getBranchTargetOpValue(const MCInst &Inst, unsigned OpNo,
76 void encodeInstruction(const MCInst &Inst, SmallVectorImpl<char> &CB,
80 unsigned adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value,
83 unsigned adjustPqBitsSpls(const MCInst &Inst, unsigned Value,
109 const MCInst &Inst, const MCOperand &MCOp, SmallVectorImpl<MCFixup> &Fixups,
134 static unsigned adjustPqBits(const MCInst &Inst, unsigned Value,
136 const MCOperand AluOp = Inst.getOperand(3);
141 const MCOperand Op2 = Inst.getOperand(2);
149 assert(Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg() &&
160 LanaiMCCodeEmitter::adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value,
162 return adjustPqBits(Inst, Value, 17, 16);
166 LanaiMCCodeEmitter::adjustPqBitsSpls(const MCInst &Inst, unsigned Value,
168 return adjustPqBits(Inst, Value, 11, 10);
172 const MCInst &Inst, SmallVectorImpl<char> &CB,
176 unsigned Value = getBinaryCodeForInstr(Inst, Fixups, SubtargetInfo);
184 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups,
187 const MCOperand Op1 = Inst.getOperand(OpNo + 0);
188 const MCOperand Op2 = Inst.getOperand(OpNo + 1);
189 const MCOperand AluOp = Inst.getOperand(OpNo + 2);
210 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo);
216 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups,
219 const MCOperand Op1 = Inst.getOperand(OpNo + 0);
220 const MCOperand Op2 = Inst.getOperand(OpNo + 1);
221 const MCOperand AluMCOp = Inst.getOperand(OpNo + 2);
254 LanaiMCCodeEmitter::getSplsOpValue(const MCInst &Inst, unsigned OpNo,
258 const MCOperand Op1 = Inst.getOperand(OpNo + 0);
259 const MCOperand Op2 = Inst.getOperand(OpNo + 1);
260 const MCOperand AluOp = Inst.getOperand(OpNo + 2);
281 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo);
287 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups,
289 const MCOperand &MCOp = Inst.getOperand(OpNo);
291 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo);