Lines Matching full:vs
46 def Combinev: OutPatFrag<(ops node:$Vs, node:$Vt),
47 (REG_SEQUENCE HvxWR, $Vs, vsub_hi, $Vt, vsub_lo)>;
57 def LoVec: OutPatFrag<(ops node:$Vs), (EXTRACT_SUBREG $Vs, vsub_lo)>;
58 def HiVec: OutPatFrag<(ops node:$Vs), (EXTRACT_SUBREG $Vs, vsub_hi)>;
72 def VSxtb: OutPatFrag<(ops node:$Vs), (V6_vunpackb $Vs)>;
73 def VSxth: OutPatFrag<(ops node:$Vs), (V6_vunpackh $Vs)>;
74 def VZxtb: OutPatFrag<(ops node:$Vs), (V6_vunpackub $Vs)>;
75 def VZxth: OutPatFrag<(ops node:$Vs), (V6_vunpackuh $Vs)>;
78 OutPatFrag<(ops node:$Imm, node:$Vs), (VSub (VSplati (i32 $Imm)), $Vs)>;
84 def VNegb: OutPatFrag<(ops node:$Vs), (VSubib 0, $Vs)>;
85 def VNegh: OutPatFrag<(ops node:$Vs), (VSubih 0, $Vs)>;
86 def VNegw: OutPatFrag<(ops node:$Vs), (VSubiw 0, $Vs)>;
197 def: Pat<(Store Value:$Vs, (add (i32 AddrFI:$fi), ImmPred:$Off)),
198 (MI AddrFI:$fi, imm:$Off, Value:$Vs)>;
199 def: Pat<(Store Value:$Vs, (IsOrAdd (i32 AddrFI:$fi), ImmPred:$Off)),
200 (MI AddrFI:$fi, imm:$Off, Value:$Vs)>;
201 def: Pat<(Store Value:$Vs, AddrFI:$fi),
202 (MI AddrFI:$fi, 0, Value:$Vs)>;
207 def: Pat<(Store Value:$Vs, (add I32:$Rt, ImmPred:$Off)),
208 (MI I32:$Rt, imm:$Off, Value:$Vs)>;
209 def: Pat<(Store Value:$Vs, (IsOrAdd I32:$Rt, ImmPred:$Off)),
210 (MI I32:$Rt, imm:$Off, Value:$Vs)>;
211 def: Pat<(Store Value:$Vs, I32:$Rt),
212 (MI I32:$Rt, 0, Value:$Vs)>;
290 def: Pat<(VecPI8 (concat_vectors HVI8:$Vs, HVI8:$Vt)),
291 (Combinev HvxVR:$Vt, HvxVR:$Vs)>;
292 def: Pat<(VecPI16 (concat_vectors HVI16:$Vs, HVI16:$Vt)),
293 (Combinev HvxVR:$Vt, HvxVR:$Vs)>;
294 def: Pat<(VecPI32 (concat_vectors HVI32:$Vs, HVI32:$Vt)),
295 (Combinev HvxVR:$Vt, HvxVR:$Vs)>;
326 def: Pat<(VecPF16 (concat_vectors HVF16:$Vs, HVF16:$Vt)),
327 (Combinev HvxVR:$Vt, HvxVR:$Vs)>;
328 def: Pat<(VecPF32 (concat_vectors HVF32:$Vs, HVF32:$Vt)),
329 (Combinev HvxVR:$Vt, HvxVR:$Vs)>;
372 : PatFrag<(ops node:$Vs), (xor $Vs, Vneg1<VecTy>)>;
376 def: Pat<(Vnot<VecI8> HVI8:$Vs), (V6_vnot HvxVR:$Vs)>;
377 def: Pat<(Vnot<VecI16> HVI16:$Vs), (V6_vnot HvxVR:$Vs)>;
378 def: Pat<(Vnot<VecI32> HVI32:$Vs), (V6_vnot HvxVR:$Vs)>;
414 def: Pat<(vselect HQ8:$Qu, HVI8:$Vs, HVI8:$Vt),
415 (V6_vmux HvxQR:$Qu, HvxVR:$Vs, HvxVR:$Vt)>;
416 def: Pat<(vselect HQ16:$Qu, HVI16:$Vs, HVI16:$Vt),
417 (V6_vmux HvxQR:$Qu, HvxVR:$Vs, HvxVR:$Vt)>;
418 def: Pat<(vselect HQ32:$Qu, HVI32:$Vs, HVI32:$Vt),
419 (V6_vmux HvxQR:$Qu, HvxVR:$Vs, HvxVR:$Vt)>;
421 def: Pat<(vselect (qnot HQ8:$Qu), HVI8:$Vs, HVI8:$Vt),
422 (V6_vmux HvxQR:$Qu, HvxVR:$Vt, HvxVR:$Vs)>;
423 def: Pat<(vselect (qnot HQ16:$Qu), HVI16:$Vs, HVI16:$Vt),
424 (V6_vmux HvxQR:$Qu, HvxVR:$Vt, HvxVR:$Vs)>;
425 def: Pat<(vselect (qnot HQ32:$Qu), HVI32:$Vs, HVI32:$Vt),
426 (V6_vmux HvxQR:$Qu, HvxVR:$Vt, HvxVR:$Vs)>;
493 def: Pat<(vselect HQ16:$Qu, HVF16:$Vs, HVF16:$Vt),
494 (V6_vmux HvxQR:$Qu, HvxVR:$Vs, HvxVR:$Vt)>;
495 def: Pat<(vselect (qnot HQ16:$Qu), HVF16:$Vs, HVF16:$Vt),
496 (V6_vmux HvxQR:$Qu, HvxVR:$Vt, HvxVR:$Vs)>;
498 def: Pat<(vselect HQ32:$Qu, HVF32:$Vs, HVF32:$Vt),
499 (V6_vmux HvxQR:$Qu, HvxVR:$Vs, HvxVR:$Vt)>;
500 def: Pat<(vselect (qnot HQ32:$Qu), HVF32:$Vs, HVF32:$Vt),
501 (V6_vmux HvxQR:$Qu, HvxVR:$Vt, HvxVR:$Vs)>;
531 // For i8 vectors Vs = (a0, a1, ...), Vt = (b0, b1, ...),
532 // V6_vmpybv Vs, Vt produces a pair of i16 vectors Hi:Lo,
534 def: Pat<(mul HVI8:$Vs, HVI8:$Vt),
535 (V6_vshuffeb (HiVec (V6_vmpybv HvxVR:$Vs, HvxVR:$Vt)),
536 (LoVec (V6_vmpybv HvxVR:$Vs, HvxVR:$Vt)))>;
537 def: Pat<(mul HVI16:$Vs, HVI16:$Vt),
538 (V6_vmpyih HvxVR:$Vs, HvxVR:$Vt)>;
539 def: Pat<(mul HVI32:$Vs, HVI32:$Vt),
540 (V6_vmpyiewuh_acc (V6_vmpyieoh HvxVR:$Vs, HvxVR:$Vt),
541 HvxVR:$Vs, HvxVR:$Vt)>;
545 def: Pat<(VecPI16 (sext HVI8:$Vs)), (VSxtb $Vs)>;
546 def: Pat<(VecPI32 (sext HVI16:$Vs)), (VSxth $Vs)>;
547 def: Pat<(VecPI16 (zext HVI8:$Vs)), (VZxtb $Vs)>;
548 def: Pat<(VecPI32 (zext HVI16:$Vs)), (VZxth $Vs)>;
550 def: Pat<(VecI16 (sext_invec HVI8:$Vs)), (LoVec (VSxtb $Vs))>;
551 def: Pat<(VecI32 (sext_invec HVI16:$Vs)), (LoVec (VSxth $Vs))>;
552 def: Pat<(VecI32 (sext_invec HVI8:$Vs)),
553 (LoVec (VSxth (LoVec (VSxtb $Vs))))>;
559 def: Pat<(VecI16 (zext_invec HVI8:$Vs)), (LoVec (VZxtb $Vs))>;
560 def: Pat<(VecI32 (zext_invec HVI16:$Vs)), (LoVec (VZxth $Vs))>;
561 def: Pat<(VecI32 (zext_invec HVI8:$Vs)),
562 (LoVec (VZxth (LoVec (VZxtb $Vs))))>;
572 // Pattern for (v32i8 (trunc v32i32:$Vs)) after widening:
575 (VecI16 (trunc (concat_vectors HVI32:$Vs, undef))),
577 (V6_vdealb4w (IMPLICIT_DEF), HvxVR:$Vs)>;
579 def: Pat<(VecQ8 (trunc HVI8:$Vs)),
580 (V6_vandvrt HvxVR:$Vs, (ToI32 0x01010101))>;
581 def: Pat<(VecQ16 (trunc HVI16:$Vs)),
582 (V6_vandvrt HvxVR:$Vs, (ToI32 0x01010101))>;
583 def: Pat<(VecQ32 (trunc HVI32:$Vs)),
584 (V6_vandvrt HvxVR:$Vs, (ToI32 0x01010101))>;
591 def: Pat<(VecI16 (sext_inreg HVI16:$Vs, v32i8)),
592 (V6_vasrh (V6_vaslh HVI16:$Vs, (ToI32 8)), (ToI32 8))>;
593 def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v16i8)),
594 (V6_vasrw (V6_vaslw HVI32:$Vs, (ToI32 24)), (ToI32 24))>;
595 def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v16i16)),
596 (V6_vasrw (V6_vaslw HVI32:$Vs, (ToI32 16)), (ToI32 16))>;
599 def: Pat<(VecI16 (sext_inreg HVI16:$Vs, v64i8)),
600 (V6_vasrh (V6_vaslh HVI16:$Vs, (ToI32 8)), (ToI32 8))>;
601 def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v32i8)),
602 (V6_vasrw (V6_vaslw HVI32:$Vs, (ToI32 24)), (ToI32 24))>;
603 def: Pat<(VecI32 (sext_inreg HVI32:$Vs, v32i16)),
604 (V6_vasrw (V6_vaslw HVI32:$Vs, (ToI32 16)), (ToI32 16))>;
607 // Take a pair of vectors Vt:Vs and shift them towards LSB by (Rt & HwLen).
608 def: Pat<(VecI8 (valign HVI8:$Vt, HVI8:$Vs, I32:$Rt)),
609 (LoVec (V6_valignb HvxVR:$Vt, HvxVR:$Vs, I32:$Rt))>;
610 def: Pat<(VecI16 (valign HVI16:$Vt, HVI16:$Vs, I32:$Rt)),
611 (LoVec (V6_valignb HvxVR:$Vt, HvxVR:$Vs, I32:$Rt))>;
612 def: Pat<(VecI32 (valign HVI32:$Vt, HVI32:$Vs, I32:$Rt)),
613 (LoVec (V6_valignb HvxVR:$Vt, HvxVR:$Vs, I32:$Rt))>;
615 def: Pat<(HexagonVASL HVI8:$Vs, I32:$Rt),
616 (V6_vshuffeb (V6_vaslh (HiVec (V6_vzb HvxVR:$Vs)), I32:$Rt),
617 (V6_vaslh (LoVec (V6_vzb HvxVR:$Vs)), I32:$Rt))>;
618 def: Pat<(HexagonVASR HVI8:$Vs, I32:$Rt),
619 (V6_vshuffeb (V6_vasrh (HiVec (V6_vsb HvxVR:$Vs)), I32:$Rt),
620 (V6_vasrh (LoVec (V6_vsb HvxVR:$Vs)), I32:$Rt))>;
621 def: Pat<(HexagonVLSR HVI8:$Vs, I32:$Rt),
622 (V6_vshuffeb (V6_vlsrh (HiVec (V6_vzb HvxVR:$Vs)), I32:$Rt),
623 (V6_vlsrh (LoVec (V6_vzb HvxVR:$Vs)), I32:$Rt))>;
625 def: Pat<(HexagonVASL HVI16:$Vs, I32:$Rt), (V6_vaslh HvxVR:$Vs, I32:$Rt)>;
626 def: Pat<(HexagonVASL HVI32:$Vs, I32:$Rt), (V6_vaslw HvxVR:$Vs, I32:$Rt)>;
627 def: Pat<(HexagonVASR HVI16:$Vs, I32:$Rt), (V6_vasrh HvxVR:$Vs, I32:$Rt)>;
628 def: Pat<(HexagonVASR HVI32:$Vs, I32:$Rt), (V6_vasrw HvxVR:$Vs, I32:$Rt)>;
629 def: Pat<(HexagonVLSR HVI16:$Vs, I32:$Rt), (V6_vlsrh HvxVR:$Vs, I32:$Rt)>;
630 def: Pat<(HexagonVLSR HVI32:$Vs, I32:$Rt), (V6_vlsrw HvxVR:$Vs, I32:$Rt)>;
637 def: Pat<(shl HVI8:$Vs, HVI8:$Vt),
638 (V6_vshuffeb (V6_vaslhv (HiVec (V6_vzb $Vs)), (HiVec (V6_vzb $Vt))),
639 (V6_vaslhv (LoVec (V6_vzb $Vs)), (LoVec (V6_vzb $Vt))))>;
640 def: Pat<(sra HVI8:$Vs, HVI8:$Vt),
641 (V6_vshuffeb (V6_vasrhv (HiVec (V6_vsb $Vs)), (HiVec (V6_vzb $Vt))),
642 (V6_vasrhv (LoVec (V6_vsb $Vs)), (LoVec (V6_vzb $Vt))))>;
643 def: Pat<(srl HVI8:$Vs, HVI8:$Vt),
644 (V6_vshuffeb (V6_vlsrhv (HiVec (V6_vzb $Vs)), (HiVec (V6_vzb $Vt))),
645 (V6_vlsrhv (LoVec (V6_vzb $Vs)), (LoVec (V6_vzb $Vt))))>;
647 def: Pat<(shl HVI16:$Vs, HVI16:$Vt), (V6_vaslhv HvxVR:$Vs, HvxVR:$Vt)>;
648 def: Pat<(shl HVI32:$Vs, HVI32:$Vt), (V6_vaslwv HvxVR:$Vs, HvxVR:$Vt)>;
649 def: Pat<(sra HVI16:$Vs, HVI16:$Vt), (V6_vasrhv HvxVR:$Vs, HvxVR:$Vt)>;
650 def: Pat<(sra HVI32:$Vs, HVI32:$Vt), (V6_vasrwv HvxVR:$Vs, HvxVR:$Vt)>;
651 def: Pat<(srl HVI16:$Vs, HVI16:$Vt), (V6_vlsrhv HvxVR:$Vs, HvxVR:$Vt)>;
652 def: Pat<(srl HVI32:$Vs, HVI32:$Vt), (V6_vlsrwv HvxVR:$Vs, HvxVR:$Vt)>;
655 def: Pat<(Mfshl HVI8:$Vu, HVI8:$Vv, HVI8:$Vs),
657 (HiVec (V6_vzb $Vs))),
659 (LoVec (V6_vzb $Vs))))>;
662 def: Pat<(Mfshl HVI16:$Vu, HVI16:$Vv, HVI16:$Vs),
663 (V6_vmux (V6_veqh $Vs, (V6_vd0)),
665 (V6_vor (V6_vaslhv $Vu, $Vs),
666 (V6_vlsrhv $Vv, (VSubih 16, $Vs))))>;
667 def: Pat<(Mfshl HVI32:$Vu, HVI32:$Vv, HVI32:$Vs),
668 (V6_vmux (V6_veqw (V6_vand $Vs, (PS_vsplatiw (i32 31))), (V6_vd0)),
670 (V6_vor (V6_vaslwv $Vu, $Vs),
671 (V6_vlsrwv $Vv, (VSubiw 32, $Vs))))>;
674 // Do it as (Vu << Vs) | (Vv >> (BW-Vs)).
675 // For Vs == 0 becomes Vu | (Vv >> -BW), since the shift amount is
677 def: Pat<(Mfshl HVI16:$Vu, HVI16:$Vv, HVI16:$Vs),
678 (V6_vor (V6_vaslhv $Vu, $Vs),
679 (V6_vlsrhv $Vv, (VSubih 16, $Vs)))>;
680 def: Pat<(Mfshl HVI32:$Vu, HVI32:$Vv, HVI32:$Vs),
681 (V6_vor (V6_vaslwv $Vu, $Vs),
682 (V6_vlsrwv $Vv, (VSubiw 32, $Vs)))>;
685 // Assume Vs > 0 (and within bit width)
686 // Vx[1]:Vx[0] = V6_vasr_into Vx[0], Vv, Vs
687 // --> (Vx[0]:Vx[0] & (ffffffff << -Vs)) | (Vv:00000000 << -Vs)
688 // i.e. Vx[1] = insert ((Vv << -Vs) -> Vx[0])
689 def: Pat<(Mfshl HVI32:$Vu, HVI32:$Vv, HVI32:$Vs),
691 (V6_vlsrwv $Vv, (VSubiw 32, $Vs))),
693 (V6_vsubw (V6_vd0), $Vs)))>;
697 def: Pat<(Mfshr HVI8:$Vu, HVI8:$Vv, HVI8:$Vs),
699 (HiVec (V6_vzb $Vs))),
701 (LoVec (V6_vzb $Vs))))>;
703 def: Pat<(Mfshr HVI16:$Vu, HVI16:$Vv, HVI16:$Vs),
704 (V6_vmux (V6_veqh $Vs, (V6_vd0)),
706 (V6_vor (V6_vaslhv $Vu, (VSubih 16, $Vs)),
707 (V6_vlsrhv $Vv, $Vs)))>;
708 def: Pat<(Mfshr HVI32:$Vu, HVI32:$Vv, HVI32:$Vs),
709 (V6_vmux (V6_veqw $Vs, (V6_vd0)),
711 (V6_vor (V6_vaslwv $Vu, (VSubiw 32, $Vs)),
712 (V6_vlsrwv $Vv, $Vs)))>;
715 // Do it as (Vu >> -(BW-Vs)) | (Vv >> Vs).
716 // For Vs == 0 becomes (Vu << BW) | Vs == 0 | Vv
717 def: Pat<(Mfshr HVI16:$Vu, HVI16:$Vv, HVI16:$Vs),
718 (V6_vor (V6_vlsrhv $Vu, (V6_vsubh $Vs, (PS_vsplatih (i32 16)))),
719 (V6_vlsrhv $Vv, $Vs))>;
720 def: Pat<(Mfshr HVI32:$Vu, HVI32:$Vv, HVI32:$Vs),
721 (V6_vor (V6_vlsrwv $Vu, (V6_vsubw $Vs, (PS_vsplatiw (i32 32)))),
722 (V6_vlsrwv $Vv, $Vs))>;
725 // Assume Vs > 0 (and within bit width)
726 // Vx[1]:Vx[0] = V6_vasr_into Vx[0], Vv, Vs
727 // --> (Vx[0]:Vx[0] & (ffffffff >> Vs)) | (Vv:00000000 >> Vs)
728 // i.e. Vx[0] = insert ((Vv >> Vs) -> Vx[0])
729 def: Pat<(Mfshr HVI32:$Vu, HVI32:$Vv, HVI32:$Vs),
731 (V6_vlsrwv $Vv, $Vs)),
733 $Vs))>;
736 def: Pat<(VecI16 (bswap HVI16:$Vs)),
737 (V6_vdelta HvxVR:$Vs, (PS_vsplatib (i32 0x01)))>;
738 def: Pat<(VecI32 (bswap HVI32:$Vs)),
739 (V6_vdelta HvxVR:$Vs, (PS_vsplatib (i32 0x03)))>;
741 def: Pat<(VecI8 (ctpop HVI8:$Vs)),
742 (V6_vshuffeb (V6_vpopcounth (HiVec (V6_vzb HvxVR:$Vs))),
743 (V6_vpopcounth (LoVec (V6_vzb HvxVR:$Vs))))>;
744 def: Pat<(VecI16 (ctpop HVI16:$Vs)), (V6_vpopcounth HvxVR:$Vs)>;
745 def: Pat<(VecI32 (ctpop HVI32:$Vs)),
746 (V6_vaddw (LoVec (V6_vzh (V6_vpopcounth HvxVR:$Vs))),
747 (HiVec (V6_vzh (V6_vpopcounth HvxVR:$Vs))))>;
749 def: Pat<(VecI8 (ctlz HVI8:$Vs)),
750 (V6_vsubb (V6_vshuffeb (V6_vcl0h (HiVec (V6_vzb HvxVR:$Vs))),
751 (V6_vcl0h (LoVec (V6_vzb HvxVR:$Vs)))),
754 def: Pat<(VecI16 (ctlz HVI16:$Vs)), (V6_vcl0h HvxVR:$Vs)>;
755 def: Pat<(VecI32 (ctlz HVI32:$Vs)), (V6_vcl0w HvxVR:$Vs)>;
759 : Pat<(select I1:$Pu, RegPred:$Vs, RegPred:$Vt),
760 (MI I1:$Pu, RegPred:$Vs, RegPred:$Vt)>;
771 def V2Q: OutPatFrag<(ops node:$Vs), (V6_vandvrt $Vs, (ToI32 -1))>;
941 def: Pat<(VecI8 (abs HVI8:$Vs)),
942 (V6_vxor HvxVR:$Vs,
943 (V6_vaddb HvxVR:$Vs,
946 (HiVec (V6_vsb HvxVR:$Vs)),
947 (LoVec (V6_vsb HvxVR:$Vs))))))>;
951 def: Pat<(VecI8 (abs HVI8:$Vs)), (V6_vabsb HvxVR:$Vs)>;
954 def: Pat<(VecI16 (abs HVI16:$Vs)), (V6_vabsh HvxVR:$Vs)>;
955 def: Pat<(VecI32 (abs HVI32:$Vs)), (V6_vabsw HvxVR:$Vs)>;