Lines Matching defs:UseMI

97   bool xformUseMI(MachineInstr *TfrMI, MachineInstr *UseMI,
110   bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI);
203     MachineInstr &UseMI = *NodeAddr<StmtNode *>(IA).Addr->getCode();
207         MI.getParent() != UseMI.getParent())
210     const MCInstrDesc &UseMID = UseMI.getDesc();
212         HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset ||
213         getBaseWithLongOffset(UseMI) < 0)
217     if (UseMID.mayStore() && UseMI.getOperand(2).isReg() &&
218         UseMI.getOperand(2).getReg() == MI.getOperand(0).getReg())
221     for (auto &Mo : UseMI.operands())
225     // Is the OffsetReg definition actually reaches UseMI?
226     if (!UseMI.getParent()->isLiveIn(OffsetReg) &&
227         MI.getParent() != UseMI.getParent()) {
230                         << UseMI.getParent()->getName() << "\n");
345     MachineInstr *UseMI = NodeAddr<StmtNode *>(IA).Addr->getCode();
349         MI->getParent() != UseMI->getParent())
351     // Is the OffsetReg definition actually reaches UseMI?
352     if (!UseMI->getParent()->isLiveIn(LRExtReg) &&
353         MI->getParent() != UseMI->getParent()) {
356                         << UseMI->getParent()->getName() << "\n");
767     MachineInstr *UseMI = OwnerN.Addr->getCode();
768     LLVM_DEBUG(dbgs() << "\t\t[MI <BB#" << UseMI->getParent()->getNumber()
769                       << ">]: " << *UseMI << "\n");
770     Changed |= updateAddUses(AddMI, UseMI);
786                                        MachineInstr *UseMI) {
791   MachineOperand &BaseOp = UseMI->getOperand(getBaseOpPosition(UseMI));
792   MachineOperand &OffsetOp = UseMI->getOperand(getOffsetOpPosition(UseMI));
994     MachineInstr *UseMI = UseIA.Addr->getCode();
995     LLVM_DEBUG(dbgs() << "[MI <" << printMBBReference(*UseMI->getParent())
996                       << ">]: " << *UseMI << "\n");
997     const MCInstrDesc &UseMID = UseMI->getDesc();
998     assert(HII->getAddrMode(*UseMI) == HexagonII::BaseImmOffset);
1000     auto UsePos = MachineBasicBlock::iterator(UseMI);
1002     short NewOpCode = getBaseWithLongOffset(*UseMI);
1006     unsigned OpEnd = UseMI->getNumOperands();
1008     MachineBasicBlock *BB = UseMI->getParent();
1010         BuildMI(*BB, InsertPt, UseMI->getDebugLoc(), HII->get(NewOpCode));
1013       MIB.add(UseMI->getOperand(0));
1017       MIB.addGlobalAddress(GV, UseMI->getOperand(2).getImm()+ImmOp.getOffset(),
1024       MIB.addGlobalAddress(GV, UseMI->getOperand(1).getImm()+ImmOp.getOffset(),
1026       MIB.add(UseMI->getOperand(2));
1032       MIB.add(UseMI->getOperand(i));
1033     Deleted.insert(UseMI);
1039 bool HexagonOptAddrMode::xformUseMI(MachineInstr *TfrMI, MachineInstr *UseMI,
1043   const MCInstrDesc &MID = UseMI->getDesc();
1046     Changed = changeLoad(UseMI, ImmOp, UseMOnum);
1048     Changed = changeStore(UseMI, ImmOp, UseMOnum);
1049   else if (UseMI->getOpcode() == Hexagon::S2_addasl_rrri)
1050     Changed = changeAddAsl(UseN, UseMI, ImmOp, UseMOnum);
1053     Deleted.insert(UseMI);
1122       MachineInstr *UseMI = OwnerN.Addr->getCode();
1123       LLVM_DEBUG(dbgs() << "\t\t[MI <" << printMBBReference(*UseMI->getParent())
1124                         << ">]: " << *UseMI << "\n");
1127       unsigned NumOperands = UseMI->getNumOperands();
1129         const MachineOperand &op = UseMI->getOperand(j);
1137       // Change UseMI if replacement is possible. If any replacement failed,
1140       if (UseMOnum >= 0 && InstrEvalResult[UseMI])
1141         Xformed = xformUseMI(MI, UseMI, UseN, UseMOnum);