Lines Matching defs:HII
596 auto &HII = *HST.getInstrInfo();
627 expandAlloca(MI, HII, SP, MaxCF);
643 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP)
709 BuildMI(MBB, InsertPt, dl, HII.get(LDOpc), RegUsed)
716 BuildMI(MBB, InsertPt, dl, HII.get(STOpc))
736 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_storeri_io))
748 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_andir), SP)
756 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::PS_call_stk))
760 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP)
769 auto &HII = *HST.getInstrInfo();
788 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP)
800 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::L2_deallocframe))
803 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_add), SP)
850 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::L2_deallocframe))
856 MachineInstr *NewI = BuildMI(MBB, RetI, dl, HII.get(NewOpc))
877 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::L2_deallocframe))
881 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP)
891 auto &HII = *HST.getInstrInfo();
908 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_allocframe))
917 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP)
922 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_allocframe))
1039 auto &HII = *HST.getInstrInfo();
1046 const MCInstrDesc &CFID = HII.get(TargetOpcode::CFI_INSTRUCTION);
1370 auto &HII = *HST.getInstrInfo();
1402 BuildMI(MBB, MI, DL, HII.get(SpillOpc))
1421 HII.storeRegToStackSlot(MBB, MI, Reg, IsKill, FI, RC, &HRI, Register());
1436 auto &HII = *HST.getInstrInfo();
1460 DeallocCall = BuildMI(MBB, MI, DL, HII.get(RetOpc))
1473 DeallocCall = BuildMI(MBB, It, DL, HII.get(RetOpc))
1486 HII.loadRegFromStackSlot(MBB, MI, Reg, FI, RC, &HRI, Register());
1720 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1730 BuildMI(B, It, DL, HII.get(TargetOpcode::COPY), TmpR).add(MI->getOperand(1));
1731 BuildMI(B, It, DL, HII.get(TargetOpcode::COPY), DstR)
1741 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1757 BuildMI(B, It, DL, HII.get(TfrOpc), TmpR)
1761 BuildMI(B, It, DL, HII.get(Hexagon::S2_storeri_io))
1774 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1786 BuildMI(B, It, DL, HII.get(Hexagon::L2_loadri_io), TmpR)
1795 BuildMI(B, It, DL, HII.get(TfrOpc), DstR)
1805 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1823 BuildMI(B, It, DL, HII.get(Hexagon::A2_tfrsi), TmpR0)
1826 BuildMI(B, It, DL, HII.get(Hexagon::V6_vandqrt), TmpR1)
1831 HII.storeRegToStackSlot(B, It, TmpR1, true, FI, RC, HRI, Register());
1832 expandStoreVec(B, std::prev(It), MRI, HII, NewRegs);
1842 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1858 BuildMI(B, It, DL, HII.get(Hexagon::A2_tfrsi), TmpR0)
1862 HII.loadRegFromStackSlot(B, It, TmpR1, FI, RC, HRI, Register());
1863 expandLoadVec(B, std::prev(It), MRI, HII, NewRegs);
1865 BuildMI(B, It, DL, HII.get(Hexagon::V6_vandvrt), DstR)
1877 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1913 BuildMI(B, It, DL, HII.get(StoreOpc))
1924 BuildMI(B, It, DL, HII.get(StoreOpc))
1937 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1959 BuildMI(B, It, DL, HII.get(LoadOpc), DstLo)
1967 BuildMI(B, It, DL, HII.get(LoadOpc), DstHi)
1978 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
1995 BuildMI(B, It, DL, HII.get(StoreOpc))
2007 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const {
2023 BuildMI(B, It, DL, HII.get(LoadOpc), DstR)
2034 auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
2048 Changed |= expandCopy(B, I, MRI, HII, NewRegs);
2052 Changed |= expandStoreInt(B, I, MRI, HII, NewRegs);
2056 Changed |= expandLoadInt(B, I, MRI, HII, NewRegs);
2059 Changed |= expandStoreVecPred(B, I, MRI, HII, NewRegs);
2062 Changed |= expandLoadVecPred(B, I, MRI, HII, NewRegs);
2065 Changed |= expandLoadVec2(B, I, MRI, HII, NewRegs);
2068 Changed |= expandStoreVec2(B, I, MRI, HII, NewRegs);
2168 auto &HII = *HST.getInstrInfo();
2222 bool Load = HII.isLoadFromStackSlot(In, LFI) && !HII.isPredicated(In);
2223 bool Store = HII.isStoreToStackSlot(In, SFI) && !HII.isPredicated(In);
2238 unsigned AM = HII.getAddrMode(In);
2244 auto *RC = HII.getRegClass(In.getDesc(), OpNum, &HRI, MF);
2253 unsigned S = HII.getMemAccessSize(In);
2412 auto *RC = HII.getRegClass(SI.getDesc(), 2, &HRI, MF);
2432 CopyIn = BuildMI(B, StartIt, DL, HII.get(TargetOpcode::COPY), FoundR)
2457 if (!HII.isLoadFromStackSlot(MI, TFI) || TFI != FI)
2464 unsigned MemSize = HII.getMemAccessSize(MI);
2465 assert(HII.getAddrMode(MI) == HexagonII::BaseImmOffset);
2467 if (HII.isSignExtendingLoad(MI))
2469 else if (HII.isZeroExtendingLoad(MI))
2471 CopyOut = BuildMI(B, It, DL, HII.get(CopyOpc), DstR)
2488 const HexagonInstrInfo &HII, Register SP, unsigned CF) const {
2513 BuildMI(MB, AI, DL, HII.get(Hexagon::A2_sub), Rd)
2518 BuildMI(MB, AI, DL, HII.get(Hexagon::A2_sub), SP)
2524 BuildMI(MB, AI, DL, HII.get(Hexagon::A2_andir), Rd)
2528 BuildMI(MB, AI, DL, HII.get(Hexagon::A2_andir), SP)
2534 BuildMI(MB, AI, DL, HII.get(TargetOpcode::COPY), SP)
2539 BuildMI(MB, AI, DL, HII.get(Hexagon::A2_addi), Rd)