Lines Matching defs:Inputs
300 // (1) Given an instruction MI, and the map with input values "Inputs",
313 virtual bool evaluate(const MachineInstr &MI, const CellMap &Inputs,
317 virtual bool evaluate(const MachineInstr &BrI, const CellMap &Inputs,
320 virtual bool rewrite(MachineInstr &MI, const CellMap &Inputs) = 0;
358 bool getCell(const RegisterSubReg &R, const CellMap &Inputs, LatticeCell &RC);
364 const CellMap &Inputs, bool &Result);
366 const CellMap &Inputs, bool &Result);
368 const CellMap &Inputs, bool &Result);
376 bool evaluateCOPY(const RegisterSubReg &R1, const CellMap &Inputs,
381 const CellMap &Inputs, LatticeCell &Result);
383 const CellMap &Inputs, LatticeCell &Result);
386 const CellMap &Inputs, LatticeCell &Result);
388 const CellMap &Inputs, LatticeCell &Result);
391 const CellMap &Inputs, LatticeCell &Result);
393 const CellMap &Inputs, LatticeCell &Result);
398 const CellMap &Inputs, LatticeCell &Result);
402 const CellMap &Inputs, LatticeCell &Result);
408 const CellMap &Inputs, LatticeCell &Result);
411 const CellMap &Inputs, LatticeCell &Result);
416 unsigned Offset, bool Signed, const CellMap &Inputs,
422 const CellMap &Inputs, LatticeCell &Result);
1079 bool MachineConstEvaluator::getCell(const RegisterSubReg &R, const CellMap &Inputs,
1083 const LatticeCell &L = Inputs.get(R.Reg);
1106 const RegisterSubReg &R2, const CellMap &Inputs, bool &Result) {
1107 assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));
1109 if (!getCell(R1, Inputs, LS1) || !getCell(R2, Inputs, LS2))
1119 return evaluateCMPrp(NegCmp, R2, Prop1, Inputs, Result);
1123 return evaluateCMPrp(Cmp, R1, Prop2, Inputs, Result);
1131 evaluateCMPri(Cmp, R1, A, Inputs, Res);
1145 const APInt &A2, const CellMap &Inputs, bool &Result) {
1146 assert(Inputs.has(R1.Reg));
1148 if (!getCell(R1, Inputs, LS))
1172 uint64_t Props2, const CellMap &Inputs, bool &Result) {
1173 assert(Inputs.has(R1.Reg));
1175 if (!getCell(R1, Inputs, LS))
1365 const CellMap &Inputs, LatticeCell &Result) {
1366 return getCell(R1, Inputs, Result);
1370 const RegisterSubReg &R2, const CellMap &Inputs, LatticeCell &Result) {
1371 assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));
1372 const LatticeCell &L1 = Inputs.get(R2.Reg);
1373 const LatticeCell &L2 = Inputs.get(R2.Reg);
1380 return evaluateANDrr(R2, R1, Inputs, Result);
1392 evaluateANDri(R1, A, Inputs, RC);
1401 const APInt &A2, const CellMap &Inputs, LatticeCell &Result) {
1402 assert(Inputs.has(R1.Reg));
1404 return getCell(R1, Inputs, Result);
1413 if (!getCell(R1, Inputs, LS1))
1437 const RegisterSubReg &R2, const CellMap &Inputs, LatticeCell &Result) {
1438 assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));
1439 const LatticeCell &L1 = Inputs.get(R2.Reg);
1440 const LatticeCell &L2 = Inputs.get(R2.Reg);
1447 return evaluateORrr(R2, R1, Inputs, Result);
1459 evaluateORri(R1, A, Inputs, RC);
1468 const APInt &A2, const CellMap &Inputs, LatticeCell &Result) {
1469 assert(Inputs.has(R1.Reg));
1471 return getCell(R1, Inputs, Result);
1480 if (!getCell(R1, Inputs, LS1))
1504 const RegisterSubReg &R2, const CellMap &Inputs, LatticeCell &Result) {
1505 assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));
1507 if (!getCell(R1, Inputs, LS1) || !getCell(R2, Inputs, LS2))
1524 evaluateXORri(R1, A, Inputs, RC);
1533 const APInt &A2, const CellMap &Inputs, LatticeCell &Result) {
1534 assert(Inputs.has(R1.Reg));
1536 if (!getCell(R1, Inputs, LS1))
1566 unsigned Bits, const CellMap &Inputs, LatticeCell &Result) {
1567 assert(Inputs.has(R1.Reg));
1569 if (!getCell(R1, Inputs, LS1))
1597 unsigned Bits, const CellMap &Inputs, LatticeCell &Result) {
1598 assert(Inputs.has(R1.Reg));
1600 if (!getCell(R1, Inputs, LS1))
1662 bool Ones, const CellMap &Inputs, LatticeCell &Result) {
1663 assert(Inputs.has(R1.Reg));
1665 if (!getCell(R1, Inputs, LS1))
1697 bool Ones, const CellMap &Inputs, LatticeCell &Result) {
1698 assert(Inputs.has(R1.Reg));
1700 if (!getCell(R1, Inputs, LS1))
1733 const CellMap &Inputs, LatticeCell &Result) {
1734 assert(Inputs.has(R1.Reg));
1737 if (!getCell(R1, Inputs, LS1))
1790 unsigned Bits, unsigned Count, const CellMap &Inputs,
1792 assert(Inputs.has(R1.Reg));
1794 if (!getCell(R1, Inputs, LS1))
1844 bool evaluate(const MachineInstr &MI, const CellMap &Inputs,
1848 bool evaluate(const MachineInstr &BrI, const CellMap &Inputs,
1851 bool rewrite(MachineInstr &MI, const CellMap &Inputs) override;
1861 bool evaluateHexRSEQ32(RegisterSubReg RL, RegisterSubReg RH, const CellMap &Inputs,
1863 bool evaluateHexCompare(const MachineInstr &MI, const CellMap &Inputs,
1867 const MachineOperand &Src2, const CellMap &Inputs, bool &Result);
1868 bool evaluateHexLogical(const MachineInstr &MI, const CellMap &Inputs,
1870 bool evaluateHexCondMove(const MachineInstr &MI, const CellMap &Inputs,
1872 bool evaluateHexExt(const MachineInstr &MI, const CellMap &Inputs,
1874 bool evaluateHexVector1(const MachineInstr &MI, const CellMap &Inputs,
1876 bool evaluateHexVector2(const MachineInstr &MI, const CellMap &Inputs,
1880 bool rewriteHexBranch(MachineInstr &BrI, const CellMap &Inputs);
1881 bool rewriteHexConstDefs(MachineInstr &MI, const CellMap &Inputs,
1883 bool rewriteHexConstUses(MachineInstr &MI, const CellMap &Inputs);
1925 const CellMap &Inputs, CellMap &Outputs) {
1943 bool Eval = evaluateCOPY(SrcR, Inputs, RC);
1965 bool Eval = evaluateHexRSEQ32(SrcRL, SrcRH, Inputs, RC);
1972 bool Eval = evaluateHexCompare(MI, Inputs, Outputs);
2024 bool Eval = evaluateHexLogical(MI, Inputs, Outputs);
2053 bool Eval = evaluateORri(R, A, Inputs, RC);
2065 bool Eval = evaluateHexCondMove(MI, Inputs, Outputs);
2077 bool Eval = evaluateHexExt(MI, Inputs, Outputs);
2092 assert(Inputs.has(R1.Reg));
2094 bool Eval = evaluateCTBr(R1, !Ones, Ones, Inputs, T);
2124 assert(Inputs.has(R1.Reg));
2126 bool Eval = evaluateCLBr(R1, !OnlyOnes, !OnlyZeros, Inputs, T);
2168 bool Eval = evaluateEXTRACTr(R1, BW, Bits, Offset, Signed, Inputs, RC);
2186 bool Eval = evaluateHexVector1(MI, Inputs, Outputs);
2259 const CellMap &Inputs, SetVector<const MachineBasicBlock*> &Targets,
2298 assert(Inputs.has(PR.Reg));
2299 const LatticeCell &PredC = Inputs.get(PR.Reg);
2327 bool HexagonConstEvaluator::rewrite(MachineInstr &MI, const CellMap &Inputs) {
2329 return rewriteHexBranch(MI, Inputs);
2349 Changed = rewriteHexConstDefs(MI, Inputs, AllDefs);
2354 Changed |= rewriteHexConstUses(MI, Inputs);
2517 const CellMap &Inputs, LatticeCell &Result) {
2518 assert(Inputs.has(RL.Reg) && Inputs.has(RH.Reg));
2520 if (!getCell(RL, Inputs, LSL) || !getCell(RH, Inputs, LSH))
2554 const CellMap &Inputs, CellMap &Outputs) {
2581 bool Computed = evaluateHexCompare2(Opc, Src1, Src2, Inputs, Result);
2600 const CellMap &Inputs, bool &Result) {
2608 return evaluateCMPrr(Cmp, R1, R2, Inputs, Result);
2611 return evaluateCMPri(Cmp, R1, A2, Inputs, Result);
2618 return evaluateCMPri(NegCmp, R2, A1, Inputs, Result);
2629 const CellMap &Inputs, CellMap &Outputs) {
2643 Eval = evaluateANDrr(R1, RegisterSubReg(Src2), Inputs, RC);
2649 Eval = evaluateANDri(R1, A, Inputs, RC);
2654 Eval = evaluateORrr(R1, RegisterSubReg(Src2), Inputs, RC);
2660 Eval = evaluateORri(R1, A, Inputs, RC);
2665 Eval = evaluateXORrr(R1, RegisterSubReg(Src2), Inputs, RC);
2676 const CellMap &Inputs, CellMap &Outputs) {
2679 assert(Inputs.has(CR.Reg));
2681 if (!getCell(CR, Inputs, LS))
2707 const LatticeCell &LR = Inputs.get(R.Reg);
2719 const CellMap &Inputs, CellMap &Outputs) {
2722 assert(Inputs.has(R1.Reg));
2754 bool Eval = Signed ? evaluateSEXTr(R1, BW, Bits, Inputs, RC)
2755 : evaluateZEXTr(R1, BW, Bits, Inputs, RC);
2763 const CellMap &Inputs, CellMap &Outputs) {
2767 assert(Inputs.has(R1.Reg));
2775 Eval = evaluateSplatr(R1, 8, 4, Inputs, RC);
2779 Eval = evaluateSplatr(R1, 16, 4, Inputs, RC);
2792 const CellMap &Inputs, bool &AllDefs) {
2809 if (!MI.isPHI() && !Inputs.has(R.Reg)) {
2814 const LatticeCell &L = Inputs.get(R.Reg);
2826 dbgs() << printReg(R, &TRI) << ": " << Inputs.get(R) << "\n";
2850 assert(Inputs.has(R));
2865 const LatticeCell &L = Inputs.get(R);
2960 const CellMap &Inputs) {
2978 assert(Inputs.has(R2.Reg) && Inputs.has(R3.Reg));
2982 bool HasC2 = getCell(R2, Inputs, LS2), HasC3 = getCell(R3, Inputs, LS3);
3040 assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));
3044 if (getCell(R1, Inputs, LS1) && LS1.isSingle()) {
3049 else if (getCell(R2, Inputs, LS2) && LS2.isSingle()) {
3076 assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));
3082 if (getCell(R1, Inputs, LS1) && (LS1.properties() & P::Zero))
3084 else if (getCell(R2, Inputs, LS2) && (LS2.properties() & P::Zero))
3135 const CellMap &Inputs) {
3143 bool Eval = evaluate(BrI, Inputs, Targets, FallsThru);