Lines Matching full:outputs
185 CellMapType &Outputs) const {
211 return evaluateLoad(MI, Inputs, Outputs);
230 if (evaluateFormalCopy(MI, Inputs, Outputs))
256 auto rr0 = [this,Reg] (const BT::RegisterCell &Val, CellMapType &Outputs)
258 putCell(Reg[0], Val, Outputs);
321 return rr0(eIMM(im(1), W0), Outputs);
323 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::Zero), Outputs);
325 return rr0(RegisterCell(W0).fill(0, W0, BT::BitValue::One), Outputs);
333 return rr0(RC, Outputs);
341 return rr0(rc(1), Outputs);
349 return rr0(RC, Outputs);
356 return rr0(eINS(RC, eXTR(rc(1), 0, PW), 0), Outputs);
371 return rr0(RC, Outputs);
375 return rr0(eADD(rc(1), rc(2)), Outputs);
377 return rr0(eADD(rc(1), eIMM(im(2), W0)), Outputs);
380 return rr0(RC, Outputs);
384 return rr0(RC, Outputs);
388 return rr0(RC, Outputs);
393 return rr0(RC, Outputs);
398 return rr0(RC, Outputs);
403 return rr0(RC, Outputs);
408 return rr0(RC, Outputs);
413 return rr0(RC, Outputs);
417 return rr0(RC, Outputs);
421 return rr0(RC, Outputs);
425 return rr0(RC, Outputs);
429 return rr0(RC, Outputs);
433 return rr0(RC, Outputs);
438 return rr0(eADD(RPC, eIMM(im(2), W0)), Outputs);
442 return rr0(eSUB(rc(1), rc(2)), Outputs);
444 return rr0(eSUB(eIMM(im(1), W0), rc(2)), Outputs);
447 return rr0(RC, Outputs);
451 return rr0(RC, Outputs);
455 return rr0(RC, Outputs);
459 return rr0(RC, Outputs);
463 return rr0(eSUB(eIMM(0, W0), rc(1)), Outputs);
467 return rr0(hi(M, W0), Outputs);
470 return rr0(eMLS(rc(1), rc(2)), Outputs);
472 return rr0(eADD(rc(1), eMLS(rc(2), rc(3))), Outputs);
474 return rr0(eSUB(rc(1), eMLS(rc(2), rc(3))), Outputs);
477 return rr0(lo(M, W0), Outputs);
482 return rr0(RC, Outputs);
487 return rr0(RC, Outputs);
492 return rr0(RC, Outputs);
497 return rr0(RC, Outputs);
501 return rr0(lo(M, 32), Outputs);
505 return rr0(lo(M, 32), Outputs);
509 return rr0(lo(M, 32), Outputs);
513 return rr0(hi(M, W0), Outputs);
516 return rr0(eMLU(rc(1), rc(2)), Outputs);
518 return rr0(eADD(rc(1), eMLU(rc(2), rc(3))), Outputs);
520 return rr0(eSUB(rc(1), eMLU(rc(2), rc(3))), Outputs);
526 return rr0(eAND(rc(1), eIMM(im(2), W0)), Outputs);
529 return rr0(eAND(rc(1), rc(2)), Outputs);
532 return rr0(eAND(rc(1), eNOT(rc(2))), Outputs);
535 return rr0(RC, Outputs);
539 return rr0(RC, Outputs);
542 return rr0(eAND(rc(1), eAND(rc(2), rc(3))), Outputs);
544 return rr0(eAND(rc(1), eAND(rc(2), eNOT(rc(3)))), Outputs);
546 return rr0(eAND(rc(1), eORL(rc(2), rc(3))), Outputs);
548 return rr0(eAND(rc(1), eXOR(rc(2), rc(3))), Outputs);
550 return rr0(eORL(rc(1), eIMM(im(2), W0)), Outputs);
553 return rr0(eORL(rc(1), rc(2)), Outputs);
556 return rr0(eORL(rc(1), eNOT(rc(2))), Outputs);
559 return rr0(RC, Outputs);
563 return rr0(RC, Outputs);
566 return rr0(eORL(rc(1), eAND(rc(2), rc(3))), Outputs);
568 return rr0(eORL(rc(1), eAND(rc(2), eNOT(rc(3)))), Outputs);
572 return rr0(RC, Outputs);
576 return rr0(RC, Outputs);
579 return rr0(eORL(rc(1), eORL(rc(2), rc(3))), Outputs);
581 return rr0(eORL(rc(1), eXOR(rc(2), rc(3))), Outputs);
584 return rr0(eXOR(rc(1), rc(2)), Outputs);
586 return rr0(eXOR(rc(1), eAND(rc(2), rc(3))), Outputs);
588 return rr0(eXOR(rc(1), eAND(rc(2), eNOT(rc(3)))), Outputs);
590 return rr0(eXOR(rc(1), eORL(rc(2), rc(3))), Outputs);
592 return rr0(eXOR(rc(1), eXOR(rc(2), rc(3))), Outputs);
595 return rr0(eNOT(rc(1)), Outputs);
599 return rr0(eASL(rc(1), im(2)), Outputs);
601 return rr0(eASL(rc(1), 16), Outputs);
604 return rr0(eADD(rc(1), eASL(rc(2), im(3))), Outputs);
607 return rr0(eSUB(rc(1), eASL(rc(2), im(3))), Outputs);
610 return rr0(eAND(rc(1), eASL(rc(2), im(3))), Outputs);
613 return rr0(eORL(rc(1), eASL(rc(2), im(3))), Outputs);
616 return rr0(eXOR(rc(1), eASL(rc(2), im(3))), Outputs);
624 return rr0(eASR(rc(1), im(2)), Outputs);
626 return rr0(eASR(rc(1), 16), Outputs);
629 return rr0(eADD(rc(1), eASR(rc(2), im(3))), Outputs);
632 return rr0(eSUB(rc(1), eASR(rc(2), im(3))), Outputs);
635 return rr0(eAND(rc(1), eASR(rc(2), im(3))), Outputs);
638 return rr0(eORL(rc(1), eASR(rc(2), im(3))), Outputs);
645 return rr0(eXTR(RC, 0, W0), Outputs);
650 return rr0(rc(1), Outputs);
654 return rr0(eXTR(RC, 0, W0), Outputs);
664 return rr0(eLSR(rc(1), im(2)), Outputs);
667 return rr0(eADD(rc(1), eLSR(rc(2), im(3))), Outputs);
670 return rr0(eSUB(rc(1), eLSR(rc(2), im(3))), Outputs);
673 return rr0(eAND(rc(1), eLSR(rc(2), im(3))), Outputs);
676 return rr0(eORL(rc(1), eLSR(rc(2), im(3))), Outputs);
679 return rr0(eXOR(rc(1), eLSR(rc(2), im(3))), Outputs);
684 return rr0(RC, Outputs);
689 return rr0(RC, Outputs);
697 return rr0(RC, Outputs);
709 return rr0(RC, Outputs);
718 return rr0(eIMM(0, W0), Outputs);
726 return rr0(eZXT(RC, Wd), Outputs);
727 return rr0(eSXT(RC, Wd), Outputs);
737 return rr0(rc(1), Outputs);
738 return rr0(eINS(rc(1), eXTR(rc(2), 0, Wd), Of), Outputs);
750 return rr0(cop(2, W0/2).cat(cop(1, W0/2)), Outputs);
764 return rr0(RC, Outputs);
773 return rr0(RC, Outputs);
777 return rr0(RC, Outputs);
781 return rr0(RC, Outputs);
785 return rr0(RC, Outputs);
789 return rr0(RC, Outputs);
802 return rr0(RC, Outputs);
815 return rr0(RegisterCell::ref(PC0 ? R2 : R3), Outputs);
817 return rr0(R2, Outputs);
826 return rr0(eSXT(rc(1), 8), Outputs);
828 return rr0(eSXT(rc(1), 16), Outputs);
833 return rr0(RC, Outputs);
836 return rr0(eZXT(rc(1), 8), Outputs);
838 return rr0(eZXT(rc(1), 16), Outputs);
843 return rr0(eSXT(RegisterCell::self(0, W0).regify(Reg0), 8), Outputs);
845 return rr0(eSXT(RegisterCell::self(0, W0).regify(Reg0), 16), Outputs);
847 return rr0(eZXT(RegisterCell::self(0, W0).regify(Reg0), 8), Outputs);
849 return rr0(eZXT(RegisterCell::self(0, W0).regify(Reg0), 16), Outputs);
856 return rr0(eCLB(rc(1), false/*bit*/, 32), Outputs);
859 return rr0(eCLB(rc(1), true/*bit*/, 32), Outputs);
866 return rr0(eCLB(R1, TV, 32), Outputs);
871 return rr0(eCTB(rc(1), false/*bit*/, 32), Outputs);
874 return rr0(eCTB(rc(1), true/*bit*/, 32), Outputs);
894 return rr0(RC, Outputs);
911 return rr0(RC, Outputs);
914 return rr0(eAND(rc(1), rc(2)), Outputs);
916 return rr0(eAND(rc(1), eNOT(rc(2))), Outputs);
918 return rr0(eNOT(rc(1)), Outputs);
920 return rr0(eORL(rc(1), rc(2)), Outputs);
922 return rr0(eORL(rc(1), eNOT(rc(2))), Outputs);
924 return rr0(eXOR(rc(1), rc(2)), Outputs);
926 return rr0(eAND(rc(1), eAND(rc(2), rc(3))), Outputs);
928 return rr0(eAND(rc(1), eAND(rc(2), eNOT(rc(3)))), Outputs);
930 return rr0(eAND(rc(1), eORL(rc(2), rc(3))), Outputs);
932 return rr0(eAND(rc(1), eORL(rc(2), eNOT(rc(3)))), Outputs);
934 return rr0(eORL(rc(1), eAND(rc(2), rc(3))), Outputs);
936 return rr0(eORL(rc(1), eAND(rc(2), eNOT(rc(3)))), Outputs);
938 return rr0(eORL(rc(1), eORL(rc(2), rc(3))), Outputs);
940 return rr0(eORL(rc(1), eORL(rc(2), eNOT(rc(3)))), Outputs);
956 return rr0(RegisterCell(W0).fill(0, W0, F), Outputs);
971 putCell(PD, RC, Outputs);
975 return MachineEvaluator::evaluate(MI, Inputs, Outputs);
1058 CellMapType &Outputs) const {
1210 putCell(RD, Res, Outputs);
1216 CellMapType &Outputs) const {
1235 putCell(RD, getCell(RS, Inputs), Outputs);
1238 // Read RD's cell from the outputs instead of RS's cell from the inputs:
1240 Res = eSXT(getCell(RD, Outputs), EW);
1242 Res = eZXT(getCell(RD, Outputs), EW);
1244 putCell(RD, Res, Outputs);