Lines Matching defs:RC
90 const TargetRegisterClass &RC = *MRI.getRegClass(Reg);
91 unsigned ID = RC.getID();
94 bool IsSubLo = (Sub == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo));
106 << TRI.getRegClassName(&RC) << '\n';
115 for (auto &RC : {HvxVRRegClass, HvxWRRegClass, HvxQRRegClass,
117 if (RC.contains(Reg))
118 return TRI.getRegSizeInBits(RC);
121 if (const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg))
122 return TRI.getRegSizeInBits(*RC);
129 const TargetRegisterClass &RC, unsigned Idx) const {
131 return RC;
135 bool IsSubLo = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo));
136 bool IsSubHi = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi));
140 switch (RC.getID()) {
151 dbgs() << "Reg class id: " << RC.getID() << " idx: " << Idx << '\n';
273 auto lo = [this] (const BT::RegisterCell &RC, uint16_t RW)
275 assert(RW <= RC.width());
276 return eXTR(RC, 0, RW);
279 auto hi = [this] (const BT::RegisterCell &RC, uint16_t RW)
281 uint16_t W = RC.width();
283 return eXTR(RC, W-RW, W);
286 auto half = [this] (const BT::RegisterCell &RC, unsigned N)
288 assert(N*16+16 <= RC.width());
289 return eXTR(RC, N*16, N*16+16);
296 RegisterCell RC = eXTR(Rt, I*BW, I*BW+BW).cat(eXTR(Rs, I*BW, I*BW+BW));
299 RC.cat(eXTR(Rt, I*BW, I*BW+BW)).cat(eXTR(Rs, I*BW, I*BW+BW));
302 return RC;
331 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0);
332 RC.fill(0, L, BT::BitValue::Zero);
333 return rr0(RC, Outputs);
347 RegisterCell RC = RegisterCell(RW).insert(PC, BT::BitMask(0, PW-1));
348 RC.fill(PW, RW, BT::BitValue::Zero);
349 return rr0(RC, Outputs);
354 RegisterCell RC = RegisterCell::self(Reg[0].Reg, RW);
355 RC.fill(PW, RW, BT::BitValue::Zero);
356 return rr0(eINS(RC, eXTR(rc(1), 0, PW), 0), Outputs);
370 RegisterCell RC = eADD(eSXT(CW, W1), rc(2));
371 return rr0(RC, Outputs);
379 RegisterCell RC = eADD(eIMM(im(1), W0), eASL(rc(2), im(3)));
380 return rr0(RC, Outputs);
383 RegisterCell RC = eADD(eIMM(im(1), W0), eLSR(rc(2), im(3)));
384 return rr0(RC, Outputs);
387 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0)));
388 return rr0(RC, Outputs);
392 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0));
393 return rr0(RC, Outputs);
397 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0));
398 return rr0(RC, Outputs);
402 RegisterCell RC = eADD(rc(1), lo(M, W0));
403 return rr0(RC, Outputs);
407 RegisterCell RC = eADD(rc(1), lo(M, W0));
408 return rr0(RC, Outputs);
412 RegisterCell RC = eADD(rc(1), lo(M, W0));
413 return rr0(RC, Outputs);
416 RegisterCell RC = eADD(rc(1), eSUB(eIMM(im(2), W0), rc(3)));
417 return rr0(RC, Outputs);
420 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0)));
421 return rr0(RC, Outputs);
424 RegisterCell RC = eADD(rc(1), eADD(rc(2), rc(3)));
425 return rr0(RC, Outputs);
428 RegisterCell RC = eADD(rc(1), eSUB(rc(2), rc(3)));
429 return rr0(RC, Outputs);
432 RegisterCell RC = eADD(rc(1), eASL(rc(2), im(3)));
433 return rr0(RC, Outputs);
446 RegisterCell RC = eSUB(eIMM(im(1), W0), eASL(rc(2), im(3)));
447 return rr0(RC, Outputs);
450 RegisterCell RC = eSUB(eIMM(im(1), W0), eLSR(rc(2), im(3)));
451 return rr0(RC, Outputs);
454 RegisterCell RC = eSUB(rc(1), eADD(rc(2), eIMM(im(3), W0)));
455 return rr0(RC, Outputs);
458 RegisterCell RC = eSUB(rc(1), eADD(rc(2), rc(3)));
459 return rr0(RC, Outputs);
481 RegisterCell RC = eADD(rc(1), lo(M, W0));
482 return rr0(RC, Outputs);
486 RegisterCell RC = eSUB(rc(1), lo(M, W0));
487 return rr0(RC, Outputs);
491 RegisterCell RC = eADD(rc(1), lo(M, W0));
492 return rr0(RC, Outputs);
496 RegisterCell RC = eSUB(rc(1), lo(M, W0));
497 return rr0(RC, Outputs);
534 RegisterCell RC = eAND(eIMM(im(1), W0), eASL(rc(2), im(3)));
535 return rr0(RC, Outputs);
538 RegisterCell RC = eAND(eIMM(im(1), W0), eLSR(rc(2), im(3)));
539 return rr0(RC, Outputs);
558 RegisterCell RC = eORL(eIMM(im(1), W0), eASL(rc(2), im(3)));
559 return rr0(RC, Outputs);
562 RegisterCell RC = eORL(eIMM(im(1), W0), eLSR(rc(2), im(3)));
563 return rr0(RC, Outputs);
571 RegisterCell RC = eORL(rc(1), eAND(rc(2), eIMM(im(3), W0)));
572 return rr0(RC, Outputs);
575 RegisterCell RC = eORL(rc(1), eORL(rc(2), eIMM(im(3), W0)));
576 return rr0(RC, Outputs);
644 RegisterCell RC = eASR(eADD(eASR(XC, im(2)), eIMM(1, 2*W0)), 1);
645 return rr0(eXTR(RC, 0, W0), Outputs);
653 RegisterCell RC = eLSR(eADD(eASR(XC, S-1), eIMM(1, 2*W0)), 1);
654 return rr0(eXTR(RC, 0, W0), Outputs);
682 RegisterCell RC = rc(1);
683 RC[im(2)] = BT::BitValue::Zero;
684 return rr0(RC, Outputs);
687 RegisterCell RC = rc(1);
688 RC[im(2)] = BT::BitValue::One;
689 return rr0(RC, Outputs);
692 RegisterCell RC = rc(1);
694 RC[BX] = RC[BX].is(0) ? BT::BitValue::One
695 : RC[BX].is(1) ? BT::BitValue::Zero
697 return rr0(RC, Outputs);
708 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1);
709 return rr0(RC, Outputs);
724 RegisterCell RC = RegisterCell(W0).insert(Ext, BT::BitMask(0, Wd-1));
726 return rr0(eZXT(RC, Wd), Outputs);
727 return rr0(eSXT(RC, Wd), Outputs);
763 RegisterCell RC = half(R2, LoH).cat(half(R1, HiH));
764 return rr0(RC, Outputs);
771 RegisterCell RC = half(R2, 0).cat(half(R1, 0)).cat(half(R2, 1))
773 return rr0(RC, Outputs);
776 RegisterCell RC = shuffle(rc(1), rc(2), 8, false);
777 return rr0(RC, Outputs);
780 RegisterCell RC = shuffle(rc(1), rc(2), 16, false);
781 return rr0(RC, Outputs);
784 RegisterCell RC = shuffle(rc(1), rc(2), 8, true);
785 return rr0(RC, Outputs);
788 RegisterCell RC = shuffle(rc(1), rc(2), 16, true);
789 return rr0(RC, Outputs);
796 RegisterCell RC(WR);
800 RC.fill(i*8, i*8+8, F);
802 return rr0(RC, Outputs);
832 RegisterCell RC = eSXT(rc(1).cat(eIMM(0, W1)), W1);
833 return rr0(RC, Outputs);
892 RegisterCell RC(W0);
893 RC.fill(0, W0, (All1 ? BT::BitValue::One : BT::BitValue::Zero));
894 return rr0(RC, Outputs);
909 RegisterCell RC(W0);
910 RC.fill(0, W0, (Has1 ? BT::BitValue::One : BT::BitValue::Zero));
911 return rr0(RC, Outputs);
969 RegisterCell RC = RegisterCell::self(DefR, RW);
970 RC.fill(PW, RW, BT::BitValue::Zero);
971 putCell(PD, RC, Outputs);