Lines Matching defs:NewR
237 static bool replaceReg(Register OldR, Register NewR,
241 static bool replaceRegWithSub(Register OldR, Register NewR, unsigned NewSR,
243 static bool replaceSubWithSub(Register OldR, unsigned OldSR, Register NewR,
383 bool HexagonBitSimplify::replaceReg(Register OldR, Register NewR,
385 if (!OldR.isVirtual() || !NewR.isVirtual())
391 I->setReg(NewR);
396 bool HexagonBitSimplify::replaceRegWithSub(Register OldR, Register NewR,
399 if (!OldR.isVirtual() || !NewR.isVirtual())
407 I->setReg(NewR);
414 Register NewR, unsigned NewSR,
416 if (!OldR.isVirtual() || !NewR.isVirtual())
426 I->setReg(NewR);
1374 Register NewR = MRI.createVirtualRegister(FRC);
1376 BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR)
1378 HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
1645 Register NewR = MRI.createVirtualRegister(FRC);
1646 BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR)
1648 BT.put(BitTracker::RegisterRef(NewR), BT.get(MR));
1649 HBS::replaceReg(R, NewR, MRI);
1664 Register NewR = MRI.createVirtualRegister(FRC);
1665 BuildMI(B, At, DL, HII.get(TargetOpcode::REG_SEQUENCE), NewR)
1670 BT.put(BitTracker::RegisterRef(NewR), BT.get(R));
1671 HBS::replaceReg(R, NewR, MRI);
2062 Register NewR = MRI.createVirtualRegister(&Hexagon::DoubleRegsRegClass);
2066 BuildMI(B, At, DL, HII.get(Hexagon::S2_packhl), NewR)
2069 HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
2070 BT.put(BitTracker::RegisterRef(NewR), RC);
2089 unsigned NewR = 0;
2094 NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
2095 BuildMI(B, At, DL, HII.get(Hexagon::A2_zxth), NewR)
2100 NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
2101 BuildMI(B, MI, DL, HII.get(Hexagon::S2_lsr_i_r), NewR)
2106 if (NewR == 0)
2108 HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
2109 BT.put(BitTracker::RegisterRef(NewR), RC);
2134 Register NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
2137 BuildMI(B, At, DL, HII.get(COpc), NewR)
2140 HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
2141 BT.put(BitTracker::RegisterRef(NewR), RC);
2191 Register NewR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
2194 auto MIB = BuildMI(B, At, DL, HII.get(NewOpc), NewR)
2200 HBS::replaceSubWithSub(RD.Reg, RD.Sub, NewR, 0, MRI);
2201 BT.put(BitTracker::RegisterRef(NewR), RC);
2313 unsigned NewR = 0;
2331 NewR = Op0.getReg();
2334 if (!NewR) {
2335 NewR = MRI.createVirtualRegister(&Hexagon::DoubleRegsRegClass);
2336 auto NewBS = BuildMI(B, At, DL, HII.get(Hexagon::A4_bitspliti), NewR)
2342 HBS::replaceRegWithSub(RD.Reg, NewR, Hexagon::isub_lo, MRI);
2343 HBS::replaceRegWithSub(S, NewR, Hexagon::isub_hi, MRI);
2345 HBS::replaceRegWithSub(S, NewR, Hexagon::isub_lo, MRI);
2346 HBS::replaceRegWithSub(RD.Reg, NewR, Hexagon::isub_hi, MRI);
2396 Register NewR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass);
2397 BuildMI(B, At, DL, HII.get(Hexagon::S2_tstbit_i), NewR)
2400 HBS::replaceReg(RD.Reg, NewR, MRI);
2401 BT.put(NewR, RC);
2405 Register NewR = MRI.createVirtualRegister(&Hexagon::PredRegsRegClass);
2407 BuildMI(B, At, DL, HII.get(NewOpc), NewR);
2408 HBS::replaceReg(RD.Reg, NewR, MRI);
2578 Register NewR = MRI.createVirtualRegister(FRC);
2581 auto MIB = BuildMI(B, At, DL, HII.get(ExtOpc), NewR)
2603 HBS::replaceReg(RD.Reg, NewR, MRI);
2604 BT.put(BitTracker::RegisterRef(NewR), RC);
2650 Register NewR = MRI.createVirtualRegister(FRC);
2651 BuildMI(B, At, DL, HII.get(Hexagon::A2_tfrsi), NewR)
2653 HBS::replaceReg(RD.Reg, NewR, MRI);
2659 BT.put(BitTracker::RegisterRef(NewR), NewRC);
2715 Register NewR = MRI.createVirtualRegister(FRC);
2716 BuildMI(B, At, DL, HII.get(Hexagon::C2_muxii), NewR)
2720 HBS::replaceReg(RD.Reg, NewR, MRI);
2725 BT.put(BitTracker::RegisterRef(NewR), NewRC);