Lines Matching defs:PredReg

73   Register PredReg;
74   ARMCC::CondCodes CC = getInstrPredicate(*Tail, PredReg);
121   Register PredReg;
122   return getITInstrPredicate(*MBBI, PredReg) == ARMCC::AL;
315                                   ARMCC::CondCodes Pred, Register PredReg,
321       .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
338         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
345         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);
354             .add(predOps(Pred, PredReg))
366             .add(predOps(Pred, PredReg))
575     Register PredReg;
576     if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL &&
789                                            Register &PredReg) {
793   return getInstrPredicate(MI, PredReg);
807                                             Register &PredReg) {
810     PredReg = 0;
814   PredReg = MI.getOperand(PIdx+1).getReg();