Lines Matching defs:Insn

278 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
281 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
285 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
287 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
290 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
293 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,
296 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
299 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
304 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,
307 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
310 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
313 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
316 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn,
319 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
322 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
325 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
328 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
331 static DecodeStatus DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn,
346 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
349 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
391 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn,
409 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
412 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
415 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn,
419 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
422 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
425 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
428 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn,
431 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn, uint64_t Address,
433 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Insn,
436 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
439 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
442 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
445 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
448 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
451 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
454 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
456 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
458 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
460 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
462 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
464 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
466 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
468 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
470 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address,
472 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address,
474 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address,
476 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address,
478 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address,
480 static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Insn,
487 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
517 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
520 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
523 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address,
525 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
560 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
563 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
566 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
569 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
591 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
594 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
625 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
630 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address,
654 static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Insn,
677 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn,
680 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn,
683 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn,
690 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address,
692 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address,
694 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn,
698 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address,
700 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,
703 static DecodeStatus DecodeLazyLoadStoreMul(MCInst &Inst, unsigned Insn,
718 uint32_t Insn,
724 uint32_t Cond = (Insn >> 28) & 0xF;
801 uint32_t Insn = llvm::support::endian::read<uint32_t>(Bytes.data(),
806 decodeInstruction(DecoderTableARM32, MI, Insn, Address, this, STI);
809 return checkDecodedInstruction(MI, Size, Address, CS, Insn, Result);
825 Result = decodeInstruction(Table.P, MI, Insn, Address, this, STI);
837 decodeInstruction(DecoderTableCoProc32, MI, Insn, Address, this, STI);
840 return checkDecodedInstruction(MI, Size, Address, CS, Insn, Result);
1869 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
1874 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1875 unsigned CRd = fieldFromInstruction(Insn, 12, 4);
1876 unsigned coproc = fieldFromInstruction(Insn, 8, 4);
1877 unsigned imm = fieldFromInstruction(Insn, 0, 8);
1878 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1879 unsigned U = fieldFromInstruction(Insn, 23, 1);
2049 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
2053 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2054 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
2055 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2056 unsigned imm = fieldFromInstruction(Insn, 0, 12);
2057 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2058 unsigned reg = fieldFromInstruction(Insn, 25, 1);
2059 unsigned P = fieldFromInstruction(Insn, 24, 1);
2060 unsigned W = fieldFromInstruction(Insn, 21, 1);
2103 if (!fieldFromInstruction(Insn, 23, 1))
2120 switch( fieldFromInstruction(Insn, 5, 2)) {
2136 unsigned amt = fieldFromInstruction(Insn, 7, 5);
2198 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,
2211 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
2216 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
2217 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2218 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2219 unsigned type = fieldFromInstruction(Insn, 22, 1);
2220 unsigned imm = fieldFromInstruction(Insn, 8, 4);
2221 unsigned U = ((~fieldFromInstruction(Insn, 23, 1)) & 1) << 8;
2222 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2223 unsigned W = fieldFromInstruction(Insn, 21, 1);
2224 unsigned P = fieldFromInstruction(Insn, 24, 1);
2255 if (!type && fieldFromInstruction(Insn, 8, 4))
2403 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn,
2408 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2409 unsigned mode = fieldFromInstruction(Insn, 23, 2);
2433 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
2438 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2439 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2440 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2441 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2444 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2458 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,
2463 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2464 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2465 unsigned reglist = fieldFromInstruction(Insn, 0, 16);
2523 if (fieldFromInstruction(Insn, 20, 1) == 0) {
2525 if (!(fieldFromInstruction(Insn, 22, 1) == 1 &&
2526 fieldFromInstruction(Insn, 20, 1) == 0))
2530 MCOperand::createImm(fieldFromInstruction(Insn, 0, 4)));
2534 return DecodeRFEInstruction(Inst, Insn, Address, Decoder);
2550 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn,
2553 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2554 unsigned imm8 = fieldFromInstruction(Insn, 0, 8);
2573 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
2576 unsigned imod = fieldFromInstruction(Insn, 18, 2);
2577 unsigned M = fieldFromInstruction(Insn, 17, 1);
2578 unsigned iflags = fieldFromInstruction(Insn, 6, 3);
2579 unsigned mode = fieldFromInstruction(Insn, 0, 5);
2585 if (fieldFromInstruction(Insn, 5, 1) != 0 ||
2586 fieldFromInstruction(Insn, 16, 1) != 0 ||
2587 fieldFromInstruction(Insn, 20, 8) != 0x10)
2621 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
2624 unsigned imod = fieldFromInstruction(Insn, 9, 2);
2625 unsigned M = fieldFromInstruction(Insn, 8, 1);
2626 unsigned iflags = fieldFromInstruction(Insn, 5, 3);
2627 unsigned mode = fieldFromInstruction(Insn, 0, 5);
2654 int imm = fieldFromInstruction(Insn, 0, 8);
2665 DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
2667 unsigned imm = fieldFromInstruction(Insn, 0, 8);
2689 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
2694 unsigned Rd = fieldFromInstruction(Insn, 8, 4);
2697 imm |= (fieldFromInstruction(Insn, 0, 8) << 0);
2698 imm |= (fieldFromInstruction(Insn, 12, 3) << 8);
2699 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2700 imm |= (fieldFromInstruction(Insn, 26, 1) << 11);
2714 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
2719 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2720 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2723 imm |= (fieldFromInstruction(Insn, 0, 12) << 0);
2724 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2742 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
2747 unsigned Rd = fieldFromInstruction(Insn, 16, 4);
2748 unsigned Rn = fieldFromInstruction(Insn, 0, 4);
2749 unsigned Rm = fieldFromInstruction(Insn, 8, 4);
2750 unsigned Ra = fieldFromInstruction(Insn, 12, 4);
2751 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2754 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2771 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
2776 unsigned Pred = fieldFromInstruction(Insn, 28, 4);
2777 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2778 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2781 return DecodeSETPANInstruction(Inst, Insn, Address, Decoder);
2793 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
2798 unsigned Imm = fieldFromInstruction(Insn, 9, 1);
2809 if (fieldFromInstruction(Insn, 20,12) != 0xf11 ||
2810 fieldFromInstruction(Insn, 4,4) != 0)
2812 if (fieldFromInstruction(Insn, 10,10) != 0 ||
2813 fieldFromInstruction(Insn, 0,4) != 0)
2891 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
2902 unsigned S = fieldFromInstruction(Insn, 26, 1);
2903 unsigned J1 = fieldFromInstruction(Insn, 13, 1);
2904 unsigned J2 = fieldFromInstruction(Insn, 11, 1);
2907 unsigned imm10 = fieldFromInstruction(Insn, 16, 10);
2908 unsigned imm11 = fieldFromInstruction(Insn, 0, 11);
2918 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
2923 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2924 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2;
2928 imm |= fieldFromInstruction(Insn, 24, 1) << 1;
2966 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
2971 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2972 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2973 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2974 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2975 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2976 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3243 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn,
3246 unsigned type = fieldFromInstruction(Insn, 8, 4);
3247 unsigned align = fieldFromInstruction(Insn, 4, 2);
3252 unsigned load = fieldFromInstruction(Insn, 21, 1);
3253 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3254 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3257 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn,
3260 unsigned size = fieldFromInstruction(Insn, 6, 2);
3263 unsigned type = fieldFromInstruction(Insn, 8, 4);
3264 unsigned align = fieldFromInstruction(Insn, 4, 2);
3268 unsigned load = fieldFromInstruction(Insn, 21, 1);
3269 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3270 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3273 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn,
3276 unsigned size = fieldFromInstruction(Insn, 6, 2);
3279 unsigned align = fieldFromInstruction(Insn, 4, 2);
3282 unsigned load = fieldFromInstruction(Insn, 21, 1);
3283 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3284 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3287 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn,
3290 unsigned size = fieldFromInstruction(Insn, 6, 2);
3293 unsigned load = fieldFromInstruction(Insn, 21, 1);
3294 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
3295 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
3298 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,
3303 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3304 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3305 unsigned wb = fieldFromInstruction(Insn, 16, 4);
3306 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3307 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
3308 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3569 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn,
3574 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3575 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3576 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3577 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3578 unsigned align = fieldFromInstruction(Insn, 4, 1);
3579 unsigned size = fieldFromInstruction(Insn, 6, 2);
3617 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn,
3622 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3623 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3624 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3625 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3626 unsigned align = fieldFromInstruction(Insn, 4, 1);
3627 unsigned size = 1 << fieldFromInstruction(Insn, 6, 2);
3666 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn,
3671 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3672 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3673 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3674 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3675 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3702 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,
3707 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3708 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3709 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3710 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3711 unsigned size = fieldFromInstruction(Insn, 6, 2);
3712 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3713 unsigned align = fieldFromInstruction(Insn, 4, 1);
3755 static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn,
3760 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3761 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3762 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3763 imm |= fieldFromInstruction(Insn, 16, 3) << 4;
3764 imm |= fieldFromInstruction(Insn, 24, 1) << 7;
3765 imm |= fieldFromInstruction(Insn, 8, 4) << 8;
3766 imm |= fieldFromInstruction(Insn, 5, 1) << 12;
3767 unsigned Q = fieldFromInstruction(Insn, 6, 1);
3801 static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn,
3806 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
3807 fieldFromInstruction(Insn, 13, 3));
3808 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
3809 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3810 imm |= fieldFromInstruction(Insn, 16, 3) << 4;
3811 imm |= fieldFromInstruction(Insn, 28, 1) << 7;
3813 imm |= fieldFromInstruction(Insn, 5, 1) << 12;
3830 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn,
3835 unsigned Qd = fieldFromInstruction(Insn, 13, 3);
3836 Qd |= fieldFromInstruction(Insn, 22, 1) << 3;
3841 unsigned Qn = fieldFromInstruction(Insn, 17, 3);
3842 Qn |= fieldFromInstruction(Insn, 7, 1) << 3;
3845 unsigned Qm = fieldFromInstruction(Insn, 1, 3);
3846 Qm |= fieldFromInstruction(Insn, 5, 1) << 3;
3849 if (!fieldFromInstruction(Insn, 12, 1)) // I bit clear => need input FPSCR
3856 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn,
3861 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3862 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3863 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3864 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3865 unsigned size = fieldFromInstruction(Insn, 18, 2);
3904 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
3909 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3910 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3911 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3912 Rn |= fieldFromInstruction(Insn, 7, 1) << 4;
3913 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3914 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3915 unsigned op = fieldFromInstruction(Insn, 6, 1);
3941 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
3946 unsigned dst = fieldFromInstruction(Insn, 8, 3);
3947 unsigned imm = fieldFromInstruction(Insn, 0, 8);
4074 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,
4079 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4080 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4115 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4149 unsigned addrmode = fieldFromInstruction(Insn, 4, 2);
4150 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2;
4151 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6;
4158 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
4163 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4164 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4165 unsigned U = fieldFromInstruction(Insn, 9, 1);
4166 unsigned imm = fieldFromInstruction(Insn, 0, 8);
4169 unsigned add = fieldFromInstruction(Insn, 9, 1);
4203 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4243 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
4248 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4249 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4250 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4285 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4324 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address,
4328 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4329 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4330 unsigned imm = fieldFromInstruction(Insn, 0, 8);
4353 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4363 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
4368 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4369 unsigned U = fieldFromInstruction(Insn, 23, 1);
4370 int imm = fieldFromInstruction(Insn, 0, 12);
4604 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,
4609 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4610 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4611 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4612 addr |= fieldFromInstruction(Insn, 9, 1) << 8;
4614 unsigned load = fieldFromInstruction(Insn, 20, 1);
4644 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
4693 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn,
4696 unsigned imm = fieldFromInstruction(Insn, 0, 7);
4705 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
4711 unsigned Rdm = fieldFromInstruction(Insn, 0, 3);
4712 Rdm |= fieldFromInstruction(Insn, 7, 1) << 3;
4720 unsigned Rm = fieldFromInstruction(Insn, 3, 4);
4731 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
4734 unsigned imod = fieldFromInstruction(Insn, 4, 1) | 0x2;
4735 unsigned flags = fieldFromInstruction(Insn, 0, 3);
4743 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
4747 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4748 unsigned add = fieldFromInstruction(Insn, 4, 1);
4757 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn,
4761 unsigned Rn = fieldFromInstruction(Insn, 3, 4);
4762 unsigned Qm = fieldFromInstruction(Insn, 0, 3);
4773 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
4777 unsigned Qm = fieldFromInstruction(Insn, 8, 3);
4778 int imm = fieldFromInstruction(Insn, 0, 7);
4783 if(!fieldFromInstruction(Insn, 7, 1)) {
4837 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Insn,
4844 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4845 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4855 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,
4860 unsigned pred = fieldFromInstruction(Insn, 22, 4);
4862 unsigned opc = fieldFromInstruction(Insn, 4, 28);
4877 unsigned imm = fieldFromInstruction(Insn, 0, 4);
4881 unsigned brtarget = fieldFromInstruction(Insn, 0, 11) << 1;
4882 brtarget |= fieldFromInstruction(Insn, 11, 1) << 19;
4883 brtarget |= fieldFromInstruction(Insn, 13, 1) << 18;
4884 brtarget |= fieldFromInstruction(Insn, 16, 6) << 12;
4885 brtarget |= fieldFromInstruction(Insn, 26, 1) << 20;
5099 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
5104 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5105 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5106 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5121 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
5126 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5127 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
5128 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5129 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5147 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
5152 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5153 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5154 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5155 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5156 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5157 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5173 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
5178 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5179 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5180 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5181 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5182 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5183 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5184 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5201 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
5206 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5207 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5208 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5209 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5210 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5211 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5227 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
5232 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5233 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5234 unsigned imm = fieldFromInstruction(Insn, 0, 12);
5235 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
5236 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
5237 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5253 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5257 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5258 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5259 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5260 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5261 unsigned size = fieldFromInstruction(Insn, 10, 2);
5269 if (fieldFromInstruction(Insn, 4, 1))
5271 index = fieldFromInstruction(Insn, 5, 3);
5274 if (fieldFromInstruction(Insn, 5, 1))
5276 index = fieldFromInstruction(Insn, 6, 2);
5277 if (fieldFromInstruction(Insn, 4, 1))
5281 if (fieldFromInstruction(Insn, 6, 1))
5283 index = fieldFromInstruction(Insn, 7, 1);
5285 switch (fieldFromInstruction(Insn, 4, 2)) {
5320 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5324 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5325 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5326 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5327 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5328 unsigned size = fieldFromInstruction(Insn, 10, 2);
5336 if (fieldFromInstruction(Insn, 4, 1))
5338 index = fieldFromInstruction(Insn, 5, 3);
5341 if (fieldFromInstruction(Insn, 5, 1))
5343 index = fieldFromInstruction(Insn, 6, 2);
5344 if (fieldFromInstruction(Insn, 4, 1))
5348 if (fieldFromInstruction(Insn, 6, 1))
5350 index = fieldFromInstruction(Insn, 7, 1);
5352 switch (fieldFromInstruction(Insn, 4, 2)) {
5385 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5389 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5390 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5391 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5392 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5393 unsigned size = fieldFromInstruction(Insn, 10, 2);
5402 index = fieldFromInstruction(Insn, 5, 3);
5403 if (fieldFromInstruction(Insn, 4, 1))
5407 index = fieldFromInstruction(Insn, 6, 2);
5408 if (fieldFromInstruction(Insn, 4, 1))
5410 if (fieldFromInstruction(Insn, 5, 1))
5414 if (fieldFromInstruction(Insn, 5, 1))
5416 index = fieldFromInstruction(Insn, 7, 1);
5417 if (fieldFromInstruction(Insn, 4, 1) != 0)
5419 if (fieldFromInstruction(Insn, 6, 1))
5452 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5456 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5457 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5458 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5459 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5460 unsigned size = fieldFromInstruction(Insn, 10, 2);
5469 index = fieldFromInstruction(Insn, 5, 3);
5470 if (fieldFromInstruction(Insn, 4, 1))
5474 index = fieldFromInstruction(Insn, 6, 2);
5475 if (fieldFromInstruction(Insn, 4, 1))
5477 if (fieldFromInstruction(Insn, 5, 1))
5481 if (fieldFromInstruction(Insn, 5, 1))
5483 index = fieldFromInstruction(Insn, 7, 1);
5484 if (fieldFromInstruction(Insn, 4, 1) != 0)
5486 if (fieldFromInstruction(Insn, 6, 1))
5515 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5519 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5520 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5521 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5522 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5523 unsigned size = fieldFromInstruction(Insn, 10, 2);
5532 if (fieldFromInstruction(Insn, 4, 1))
5534 index = fieldFromInstruction(Insn, 5, 3);
5537 if (fieldFromInstruction(Insn, 4, 1))
5539 index = fieldFromInstruction(Insn, 6, 2);
5540 if (fieldFromInstruction(Insn, 5, 1))
5544 if (fieldFromInstruction(Insn, 4, 2))
5546 index = fieldFromInstruction(Insn, 7, 1);
5547 if (fieldFromInstruction(Insn, 6, 1))
5585 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5589 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5590 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5591 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5592 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5593 unsigned size = fieldFromInstruction(Insn, 10, 2);
5602 if (fieldFromInstruction(Insn, 4, 1))
5604 index = fieldFromInstruction(Insn, 5, 3);
5607 if (fieldFromInstruction(Insn, 4, 1))
5609 index = fieldFromInstruction(Insn, 6, 2);
5610 if (fieldFromInstruction(Insn, 5, 1))
5614 if (fieldFromInstruction(Insn, 4, 2))
5616 index = fieldFromInstruction(Insn, 7, 1);
5617 if (fieldFromInstruction(Insn, 6, 1))
5648 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5652 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5653 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5654 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5655 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5656 unsigned size = fieldFromInstruction(Insn, 10, 2);
5665 if (fieldFromInstruction(Insn, 4, 1))
5667 index = fieldFromInstruction(Insn, 5, 3);
5670 if (fieldFromInstruction(Insn, 4, 1))
5672 index = fieldFromInstruction(Insn, 6, 2);
5673 if (fieldFromInstruction(Insn, 5, 1))
5677 switch (fieldFromInstruction(Insn, 4, 2)) {
5683 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
5686 index = fieldFromInstruction(Insn, 7, 1);
5687 if (fieldFromInstruction(Insn, 6, 1))
5729 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
5733 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5734 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
5735 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
5736 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
5737 unsigned size = fieldFromInstruction(Insn, 10, 2);
5746 if (fieldFromInstruction(Insn, 4, 1))
5748 index = fieldFromInstruction(Insn, 5, 3);
5751 if (fieldFromInstruction(Insn, 4, 1))
5753 index = fieldFromInstruction(Insn, 6, 2);
5754 if (fieldFromInstruction(Insn, 5, 1))
5758 switch (fieldFromInstruction(Insn, 4, 2)) {
5764 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
5767 index = fieldFromInstruction(Insn, 7, 1);
5768 if (fieldFromInstruction(Insn, 6, 1))
5801 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address,
5804 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5805 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
5806 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
5807 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5808 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
5827 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address,
5830 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5831 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
5832 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
5833 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5834 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
5853 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address,
5856 unsigned pred = fieldFromInstruction(Insn, 4, 4);
5857 unsigned mask = fieldFromInstruction(Insn, 0, 4);
5882 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
5887 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5888 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
5889 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5890 unsigned addr = fieldFromInstruction(Insn, 0, 8);
5891 unsigned W = fieldFromInstruction(Insn, 21, 1);
5892 unsigned U = fieldFromInstruction(Insn, 23, 1);
5893 unsigned P = fieldFromInstruction(Insn, 24, 1);
5919 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
5924 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5925 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
5926 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5927 unsigned addr = fieldFromInstruction(Insn, 0, 8);
5928 unsigned W = fieldFromInstruction(Insn, 21, 1);
5929 unsigned U = fieldFromInstruction(Insn, 23, 1);
5930 unsigned P = fieldFromInstruction(Insn, 24, 1);
5954 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address,
5956 unsigned sign1 = fieldFromInstruction(Insn, 21, 1);
5957 unsigned sign2 = fieldFromInstruction(Insn, 23, 1);
5959 const unsigned Rd = fieldFromInstruction(Insn, 8, 4);
5963 unsigned Val = fieldFromInstruction(Insn, 0, 8);
5964 Val |= fieldFromInstruction(Insn, 12, 3) << 8;
5965 Val |= fieldFromInstruction(Insn, 26, 1) << 11;
5991 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address,
5993 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5994 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4);
5995 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5996 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5999 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
6018 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address,
6024 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
6025 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
6026 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
6027 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
6028 unsigned imm = fieldFromInstruction(Insn, 16, 6);
6029 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
6030 unsigned op = fieldFromInstruction(Insn, 5, 1);
6063 return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);
6077 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address,
6083 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
6084 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
6085 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
6086 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
6087 unsigned imm = fieldFromInstruction(Insn, 16, 6);
6088 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
6089 unsigned op = fieldFromInstruction(Insn, 5, 1);
6122 return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);
6137 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn,
6140 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
6141 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
6142 unsigned Vn = (fieldFromInstruction(Insn, 16, 4) << 0);
6143 Vn |= (fieldFromInstruction(Insn, 7, 1) << 4);
6144 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
6145 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
6146 unsigned q = (fieldFromInstruction(Insn, 6, 1) << 0);
6147 unsigned rotate = (fieldFromInstruction(Insn, 20, 2) << 0);
6334 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
6341 unsigned Imm = fieldFromInstruction(Insn, 11, 1) |
6342 fieldFromInstruction(Insn, 1, 10) << 1;
6361 DecoderGPRRegisterClass(Inst, fieldFromInstruction(Insn, 16, 4),
6372 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
6378 if ((Insn & ~SBZMask) != CanonicalLCTP)
6380 if (Insn != CanonicalLCTP)
6387 fieldFromInstruction(Insn, 16, 4),
6449 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address,
6455 unsigned regs = fieldFromInstruction(Insn, 0, 8);
6459 unsigned reglist = regs | (fieldFromInstruction(Insn, 12, 4) << 8) |
6460 (fieldFromInstruction(Insn, 22, 1) << 12);
6465 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 1) |
6466 fieldFromInstruction(Insn, 22, 1);
6819 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn,
6823 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
6824 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
6825 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
6826 fieldFromInstruction(Insn, 13, 3));
6827 unsigned index = fieldFromInstruction(Insn, 4, 1);
6843 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn,
6847 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
6848 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
6849 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
6850 fieldFromInstruction(Insn, 13, 3));
6851 unsigned index = fieldFromInstruction(Insn, 4, 1);
6870 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address,
6874 unsigned RdaLo = fieldFromInstruction(Insn, 17, 3) << 1;
6875 unsigned RdaHi = fieldFromInstruction(Insn, 9, 3) << 1;
6876 unsigned Rm = fieldFromInstruction(Insn, 12, 4);
6884 unsigned Rda = fieldFromInstruction(Insn, 16, 4);
6911 if (fieldFromInstruction (Insn, 6, 3) != 4)
6941 unsigned Saturate = fieldFromInstruction(Insn, 7, 1);
6949 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn,
6953 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) |
6954 fieldFromInstruction(Insn, 13, 3));
6955 unsigned Qm = ((fieldFromInstruction(Insn, 5, 1) << 3) |
6956 fieldFromInstruction(Insn, 1, 3));
6957 unsigned imm6 = fieldFromInstruction(Insn, 16, 6);
6970 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address,
6974 unsigned Qn = fieldFromInstruction(Insn, 17, 3);
6981 fc = fieldFromInstruction(Insn, 12, 1) << 2 |
6982 fieldFromInstruction(Insn, 7, 1) |
6983 fieldFromInstruction(Insn, 5, 1) << 1;
6984 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
6988 fc = fieldFromInstruction(Insn, 12, 1) << 2 |
6989 fieldFromInstruction(Insn, 7, 1) |
6990 fieldFromInstruction(Insn, 0, 1) << 1;
6991 unsigned Qm = fieldFromInstruction(Insn, 5, 1) << 4 |
6992 fieldFromInstruction(Insn, 1, 3);
7007 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address,
7011 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
7017 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn,
7026 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,
7029 const unsigned Rd = fieldFromInstruction(Insn, 8, 4);
7030 const unsigned Rn = fieldFromInstruction(Insn, 16, 4);
7031 const unsigned Imm12 = fieldFromInstruction(Insn, 26, 1) << 11 |
7032 fieldFromInstruction(Insn, 12, 3) << 8 |
7033 fieldFromInstruction(Insn, 0, 8);
7034 const unsigned TypeT3 = fieldFromInstruction(Insn, 25, 1);
7035 unsigned sign1 = fieldFromInstruction(Insn, 21, 1);
7036 unsigned sign2 = fieldFromInstruction(Insn, 23, 1);
7037 unsigned S = fieldFromInstruction(Insn, 20, 1);
7061 static DecodeStatus DecodeLazyLoadStoreMul(MCInst &Inst, unsigned Insn,
7066 const unsigned Rn = fieldFromInstruction(Insn, 16, 4);