Lines Matching defs:ISD
502 int ISD = TLI->InstructionOpcodeToISD(Opcode);
503 assert(ISD && "Invalid opcode");
542 {ISD::SIGN_EXTEND, MVT::i32, MVT::i16, 0},
543 {ISD::ZERO_EXTEND, MVT::i32, MVT::i16, 0},
544 {ISD::SIGN_EXTEND, MVT::i32, MVT::i8, 0},
545 {ISD::ZERO_EXTEND, MVT::i32, MVT::i8, 0},
546 {ISD::SIGN_EXTEND, MVT::i16, MVT::i8, 0},
547 {ISD::ZERO_EXTEND, MVT::i16, MVT::i8, 0},
548 {ISD::SIGN_EXTEND, MVT::i64, MVT::i32, 1},
549 {ISD::ZERO_EXTEND, MVT::i64, MVT::i32, 1},
550 {ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 1},
551 {ISD::ZERO_EXTEND, MVT::i64, MVT::i16, 1},
552 {ISD::SIGN_EXTEND, MVT::i64, MVT::i8, 1},
553 {ISD::ZERO_EXTEND, MVT::i64, MVT::i8, 1},
556 LoadConversionTbl, ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT()))
560 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0},
561 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0},
562 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 0},
563 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 0},
564 {ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 0},
565 {ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 0},
569 {ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 1},
570 {ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 1},
571 {ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 3},
572 {ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 3},
573 {ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 1},
574 {ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 1},
578 ConvertCostTableLookup(MVELoadConversionTbl, ISD,
585 {ISD::FP_EXTEND, MVT::v4f32, MVT::v4f16, 1},
586 {ISD::FP_EXTEND, MVT::v8f32, MVT::v8f16, 3},
590 ConvertCostTableLookup(MVEFLoadConversionTbl, ISD,
597 {ISD::TRUNCATE, MVT::v4i32, MVT::v4i16, 0},
598 {ISD::TRUNCATE, MVT::v4i32, MVT::v4i8, 0},
599 {ISD::TRUNCATE, MVT::v8i16, MVT::v8i8, 0},
600 {ISD::TRUNCATE, MVT::v8i32, MVT::v8i16, 1},
601 {ISD::TRUNCATE, MVT::v8i32, MVT::v8i8, 1},
602 {ISD::TRUNCATE, MVT::v16i32, MVT::v16i8, 3},
603 {ISD::TRUNCATE, MVT::v16i16, MVT::v16i8, 1},
607 ConvertCostTableLookup(MVEStoreConversionTbl, ISD,
613 {ISD::FP_ROUND, MVT::v4f32, MVT::v4f16, 1},
614 {ISD::FP_ROUND, MVT::v8f32, MVT::v8f16, 3},
618 ConvertCostTableLookup(MVEFStoreConversionTbl, ISD,
625 if ((ISD == ISD::SIGN_EXTEND || ISD == ISD::ZERO_EXTEND) &&
629 { ISD::ADD, MVT::v4i32, MVT::v4i16, 0 },
630 { ISD::ADD, MVT::v8i16, MVT::v8i8, 0 },
632 { ISD::SUB, MVT::v4i32, MVT::v4i16, 0 },
633 { ISD::SUB, MVT::v8i16, MVT::v8i8, 0 },
635 { ISD::MUL, MVT::v4i32, MVT::v4i16, 0 },
636 { ISD::MUL, MVT::v8i16, MVT::v8i8, 0 },
638 { ISD::SHL, MVT::v4i32, MVT::v4i16, 0 },
639 { ISD::SHL, MVT::v8i16, MVT::v8i8, 0 },
653 ((ISD == ISD::FP_ROUND && SrcTy.getScalarType() == MVT::f64 &&
655 (ISD == ISD::FP_EXTEND && SrcTy.getScalarType() == MVT::f32 &&
659 {ISD::FP_ROUND, MVT::v2f64, 2},
660 {ISD::FP_EXTEND, MVT::v2f32, 2},
661 {ISD::FP_EXTEND, MVT::v4f32, 4}};
664 if (const auto *Entry = CostTableLookup(NEONFltDblTbl, ISD, LT.second))
672 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
673 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
674 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
675 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
676 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 0 },
677 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 },
680 { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
681 { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
682 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
683 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
684 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i8, 3 },
685 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i8, 3 },
686 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i16, 2 },
687 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i16, 2 },
688 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 3 },
689 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 },
690 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 },
691 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 },
692 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
693 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
694 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
695 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
696 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 },
697 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 },
700 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 6 },
701 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 },
704 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
705 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
707 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
708 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
709 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
710 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
711 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
712 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
713 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 },
714 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 },
715 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
716 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
717 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
718 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
719 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
720 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
721 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 },
722 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 },
723 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 },
724 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 },
725 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i32, 4 },
726 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i32, 4 },
728 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 },
729 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 },
730 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 3 },
731 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 },
732 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 },
733 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 },
736 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
737 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
739 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
740 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
741 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
742 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
743 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
744 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
746 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 },
747 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 },
748 { ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f32, 4 },
749 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 },
750 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 8 },
751 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 }
755 if (const auto *Entry = ConvertCostTableLookup(NEONVectorConversionTbl, ISD,
763 { ISD::FP_TO_SINT, MVT::i1, MVT::f32, 2 },
764 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 },
765 { ISD::FP_TO_SINT, MVT::i1, MVT::f64, 2 },
766 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 },
767 { ISD::FP_TO_SINT, MVT::i8, MVT::f32, 2 },
768 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 },
769 { ISD::FP_TO_SINT, MVT::i8, MVT::f64, 2 },
770 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 },
771 { ISD::FP_TO_SINT, MVT::i16, MVT::f32, 2 },
772 { ISD::FP_TO_UINT, MVT::i16, MVT::f32, 2 },
773 { ISD::FP_TO_SINT, MVT::i16, MVT::f64, 2 },
774 { ISD::FP_TO_UINT, MVT::i16, MVT::f64, 2 },
775 { ISD::FP_TO_SINT, MVT::i32, MVT::f32, 2 },
776 { ISD::FP_TO_UINT, MVT::i32, MVT::f32, 2 },
777 { ISD::FP_TO_SINT, MVT::i32, MVT::f64, 2 },
778 { ISD::FP_TO_UINT, MVT::i32, MVT::f64, 2 },
779 { ISD::FP_TO_SINT, MVT::i64, MVT::f32, 10 },
780 { ISD::FP_TO_UINT, MVT::i64, MVT::f32, 10 },
781 { ISD::FP_TO_SINT, MVT::i64, MVT::f64, 10 },
782 { ISD::FP_TO_UINT, MVT::i64, MVT::f64, 10 }
785 if (const auto *Entry = ConvertCostTableLookup(NEONFloatConversionTbl, ISD,
793 { ISD::SINT_TO_FP, MVT::f32, MVT::i1, 2 },
794 { ISD::UINT_TO_FP, MVT::f32, MVT::i1, 2 },
795 { ISD::SINT_TO_FP, MVT::f64, MVT::i1, 2 },
796 { ISD::UINT_TO_FP, MVT::f64, MVT::i1, 2 },
797 { ISD::SINT_TO_FP, MVT::f32, MVT::i8, 2 },
798 { ISD::UINT_TO_FP, MVT::f32, MVT::i8, 2 },
799 { ISD::SINT_TO_FP, MVT::f64, MVT::i8, 2 },
800 { ISD::UINT_TO_FP, MVT::f64, MVT::i8, 2 },
801 { ISD::SINT_TO_FP, MVT::f32, MVT::i16, 2 },
802 { ISD::UINT_TO_FP, MVT::f32, MVT::i16, 2 },
803 { ISD::SINT_TO_FP, MVT::f64, MVT::i16, 2 },
804 { ISD::UINT_TO_FP, MVT::f64, MVT::i16, 2 },
805 { ISD::SINT_TO_FP, MVT::f32, MVT::i32, 2 },
806 { ISD::UINT_TO_FP, MVT::f32, MVT::i32, 2 },
807 { ISD::SINT_TO_FP, MVT::f64, MVT::i32, 2 },
808 { ISD::UINT_TO_FP, MVT::f64, MVT::i32, 2 },
809 { ISD::SINT_TO_FP, MVT::f32, MVT::i64, 10 },
810 { ISD::UINT_TO_FP, MVT::f32, MVT::i64, 10 },
811 { ISD::SINT_TO_FP, MVT::f64, MVT::i64, 10 },
812 { ISD::UINT_TO_FP, MVT::f64, MVT::i64, 10 }
817 ISD, DstTy.getSimpleVT(),
826 { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
827 { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
828 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
829 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
830 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i8, 10 },
831 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i8, 2 },
832 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
833 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
834 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i16, 10 },
835 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i16, 2 },
836 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 8 },
837 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 2 },
842 ISD, DstTy.getSimpleVT(),
847 if (ISD == ISD::FP_ROUND || ISD == ISD::FP_EXTEND) {
863 if (ISD == ISD::TRUNCATE && ST->hasMVEIntegerOps() &&
878 { ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 2 },
881 { ISD::TRUNCATE, MVT::i32, MVT::i64, 0 },
882 { ISD::TRUNCATE, MVT::i16, MVT::i64, 0 },
883 { ISD::TRUNCATE, MVT::i8, MVT::i64, 0 },
884 { ISD::TRUNCATE, MVT::i1, MVT::i64, 0 }
888 if (const auto *Entry = ConvertCostTableLookup(ARMIntegerConversionTbl, ISD,
944 int ISD = TLI->InstructionOpcodeToISD(Opcode);
947 if (CostKind == TTI::TCK_CodeSize && ISD == ISD::SELECT &&
1017 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT && CondTy) {
1020 { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4*4 + 1*2 + 1 },
1021 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 },
1022 { ISD::SELECT, MVT::v16i1, MVT::v16i64, 100 }
1028 if (const auto *Entry = ConvertCostTableLookup(NEONVectorSelectTbl, ISD,
1248 {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1},
1249 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1},
1250 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
1251 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
1252 {ISD::VECTOR_SHUFFLE, MVT::v4i16, 1},
1253 {ISD::VECTOR_SHUFFLE, MVT::v8i8, 1},
1255 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1},
1256 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 1},
1257 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 1},
1258 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 1}};
1262 CostTableLookup(NEONDupTbl, ISD::VECTOR_SHUFFLE, LT.second))
1269 {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1},
1270 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1},
1271 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
1272 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
1273 {ISD::VECTOR_SHUFFLE, MVT::v4i16, 1},
1274 {ISD::VECTOR_SHUFFLE, MVT::v8i8, 1},
1276 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2},
1277 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2},
1278 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 2},
1279 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}};
1283 CostTableLookup(NEONShuffleTbl, ISD::VECTOR_SHUFFLE, LT.second))
1292 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1},
1293 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1},
1294 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1},
1295 {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1},
1297 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2},
1298 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2},
1299 {ISD::VECTOR_SHUFFLE, MVT::v4i16, 2},
1301 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 16},
1303 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 32}};
1307 ISD::VECTOR_SHUFFLE, LT.second))
1315 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1},
1316 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 1},
1317 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 1},
1318 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 1},
1319 {ISD::VECTOR_SHUFFLE, MVT::v8f16, 1}};
1322 if (const auto *Entry = CostTableLookup(MVEDupTbl, ISD::VECTOR_SHUFFLE,
1361 case ISD::AND:
1362 case ISD::XOR:
1364 case ISD::OR:
1379 { ISD::SDIV, MVT::v1i64, 1 * FunctionCallDivCost},
1380 { ISD::UDIV, MVT::v1i64, 1 * FunctionCallDivCost},
1381 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost},
1382 { ISD::UREM, MVT::v1i64, 1 * FunctionCallDivCost},
1383 { ISD::SDIV, MVT::v2i32, 2 * FunctionCallDivCost},
1384 { ISD::UDIV, MVT::v2i32, 2 * FunctionCallDivCost},
1385 { ISD::SREM, MVT::v2i32, 2 * FunctionCallDivCost},
1386 { ISD::UREM, MVT::v2i32, 2 * FunctionCallDivCost},
1387 { ISD::SDIV, MVT::v4i16, ReciprocalDivCost},
1388 { ISD::UDIV, MVT::v4i16, ReciprocalDivCost},
1389 { ISD::SREM, MVT::v4i16, 4 * FunctionCallDivCost},
1390 { ISD::UREM, MVT::v4i16, 4 * FunctionCallDivCost},
1391 { ISD::SDIV, MVT::v8i8, ReciprocalDivCost},
1392 { ISD::UDIV, MVT::v8i8, ReciprocalDivCost},
1393 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost},
1394 { ISD::UREM, MVT::v8i8, 8 * FunctionCallDivCost},
1396 { ISD::SDIV, MVT::v2i64, 2 * FunctionCallDivCost},
1397 { ISD::UDIV, MVT::v2i64, 2 * FunctionCallDivCost},
1398 { ISD::SREM, MVT::v2i64, 2 * FunctionCallDivCost},
1399 { ISD::UREM, MVT::v2i64, 2 * FunctionCallDivCost},
1400 { ISD::SDIV, MVT::v4i32, 4 * FunctionCallDivCost},
1401 { ISD::UDIV, MVT::v4i32, 4 * FunctionCallDivCost},
1402 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost},
1403 { ISD::UREM, MVT::v4i32, 4 * FunctionCallDivCost},
1404 { ISD::SDIV, MVT::v8i16, 8 * FunctionCallDivCost},
1405 { ISD::UDIV, MVT::v8i16, 8 * FunctionCallDivCost},
1406 { ISD::SREM, MVT::v8i16, 8 * FunctionCallDivCost},
1407 { ISD::UREM, MVT::v8i16, 8 * FunctionCallDivCost},
1408 { ISD::SDIV, MVT::v16i8, 16 * FunctionCallDivCost},
1409 { ISD::UDIV, MVT::v16i8, 16 * FunctionCallDivCost},
1410 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost},
1411 { ISD::UREM, MVT::v16i8, 16 * FunctionCallDivCost},
1705 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1711 if ((ISD == ISD::FADD || ISD == ISD::FMUL) &&
1740 if ((ISD == ISD::AND || ISD == ISD::OR || ISD == ISD::XOR) &&
1768 if (!ST->hasMVEIntegerOps() || !ValVT.isSimple() || ISD != ISD::ADD ||
1775 {ISD::ADD, MVT::v16i8, 1},
1776 {ISD::ADD, MVT::v8i16, 1},
1777 {ISD::ADD, MVT::v4i32, 1},
1779 if (const auto *Entry = CostTableLookup(CostTblAdd, ISD, LT.second))
1791 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1793 switch (ISD) {
1794 case ISD::ADD:
1895 {ISD::SMIN, MVT::v16i8, 4},
1896 {ISD::SMIN, MVT::v8i16, 3},
1897 {ISD::SMIN, MVT::v4i32, 2},
1899 if (const auto *Entry = CostTableLookup(CostTblAdd, ISD::SMIN, LT.second))
2115 unsigned ISD = TLI->InstructionOpcodeToISD(I.getOpcode());
2117 if (TLI->getOperationAction(ISD, VT) == TargetLowering::LibCall)
2158 switch (ISD) {
2161 case ISD::SDIV:
2162 case ISD::UDIV:
2163 case ISD::SREM:
2164 case ISD::UREM:
2165 case ISD::SDIVREM:
2166 case ISD::UDIVREM: